3 дня назад
Senior Standard Cell Library Engineer
122 440 - 232 190$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior Standard Cell Library Engineer (Semiconductor Physical Design): Designing, characterizing, validating, and releasing standard cell collateral with an accent on power, performance, area, manufacturability, and reliability. Focus on implementing end-to-end physical design flows, running data-driven experiments, and optimizing timing, congestion, power, signal integrity, and design quality.
Location: Hybrid work model with on-site time at sites in Santa Clara or Folsom, California, United States
Annual salary: $122,440–$232,190 USD
Company
's Foundry Standard Cell team develops semiconductor technologies and standard cell solutions for customers.
What you will do
- Design, implement, characterize, and validate standard cell solutions against power, performance, area, manufacturability, and cost requirements.
- Execute physical design flows covering standard cell circuits, layout, extraction, characterization, and optimization.
- Optimize timing, congestion, power, signal integrity, and reliability to meet design goals.
- Develop and run end-to-end experiments, analyze results, and guide data-driven decisions for technical and management audiences.
- Generate, validate, and release custom standard cell collateral in response to on-demand requests.
- Collaborate with standard cell collateral teams and review work for design, manufacturing, and quality compliance.
Requirements
- Bachelor's degree in Electrical Engineering, Electronics Engineering, Nanoscience, Microelectronics, Computer Engineering, or a related STEM field.
- At least 2 years of experience in standard cell layout, abstract modeling, standard cell characterization, or ASIC design and verification.
- Experience with one or more relevant EDA tools, including Cadence Virtuoso, Synopsys Custom Compiler, Cadence Liberate, Synopsys PrimeLib, Innovus, Fusion Compiler, Tempus, PrimeTime, HSpice, StarRC, ICV, Pegasus, or Calibre.
- Strong written and verbal communication skills, with the ability to adapt communication to different audiences.
- Ability to work in a hybrid model with regular on-site presence at an assigned site in California.
Nice to have
- Postgraduate degree in a relevant engineering, microelectronics, nanoscience, or STEM field.
- Unix proficiency and command-line scripting experience with csh, bash, Perl, or Python.
Culture & Benefits
- Hybrid work model combining on-site and off-site work.
- Competitive pay and stock bonuses.
- Health, retirement, and vacation benefits.
- Opportunity to contribute to semiconductor technologies that connect and enrich lives globally.
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