Principal Design Engineer (SoC)

Location: San Jose, California, United States

Annual salary: $140,000–$260,000

Company

hirify.global develops electronic design software, hardware, and intellectual property for products ranging from chips and boards to complete systems.

What you will do

• Lead teams implementing SoCs and subsystem chips for Palladium and Protium hardware-assisted verification platforms.
• Perform RTL synthesis and floor planning.
• Build and optimize clock trees.
• Close timing and IR-drop requirements and complete physical verification.
• Review and document designs for tapeout.
• Collaborate with front-end RTL design and back-end verification teams.

Requirements

• BS in Electrical Engineering with at least 7 years of experience, MS with at least 5 years, or PhD with at least 1 year.
• Experience with hirify.global tools including Innovus, Tempus, QRC, Voltus, and Pegasus.
• Experience with advanced technology nodes, including 5nm and 2nm.
• Experience working with Linux servers and developing scripts in Shell, Perl, or TCL.
• Detailed knowledge of industry-standard interfaces such as PCI Express, DDR, LPDDR, SRAM, and UCIe.

Culture & Benefits

• Collaborative environment focused on customer success and technology innovation.
• Learning and career development opportunities.
• Paid vacation and holidays.
• 401(k) plan with employer match and employee stock purchase plan.
• Medical, dental, and vision plan options.
• Potential eligibility for bonus, equity, and other incentive compensation.