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8 дней назад

Sr. Principal IC Digital Flow AE (EDA)

148 400 - 275 600$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Sr. Principal IC Digital Flow AE (EDA): Supporting customers with Cadence digital implementation and signoff technologies across synthesis, place and route, design closure, and timing/power signoff with an accent on advanced-node physical design and customer-facing technical evaluations. Focus on guiding flow adoption, scripting with Tcl/Perl/Python, improving EDA methodologies with R&D, and solving complex PPA and design-closure challenges.

Location: San Jose, California

Annual salary: $148,400–$275,600, plus potential incentive compensation, equity, and benefits.

Company

hirify.global develops semiconductor design and electronic design automation technologies for digital implementation, verification, and signoff.

What you will do

  • Provide technical support for backend digital design implementation and signoff, including place and route, design closure, and timing and power signoff.
  • Guide customers in using hirify.global technologies to meet design goals, PPA targets, and project schedules.
  • Conduct technical presentations, product demonstrations, evaluations, and benchmarks.
  • Collaborate with R&D to improve tools and methodologies in response to customer requirements.
  • Drive adoption of hirify.global tools and technologies while capturing best practices for future engagements.
  • Amend and augment implementation flows using Tcl and other programming skills.

Requirements

  • 10+ years of industry experience in physical design.
  • BS degree in Computer Science, Engineering, Electrical Engineering, or a related field.
  • Strong knowledge of digital design, semiconductor fundamentals, and static timing analysis.
  • Experience with IC digital implementation flows, backend EDA tools, place and route, IR drop, timing closure, and power closure.
  • Experience with advanced nodes of 10nm and below.
  • Proficiency in Tcl, Perl, or Python, along with strong customer-facing communication and problem-solving skills.

Nice to have

  • MS degree in Computer Science, Engineering, Electrical Engineering, or a related field.
  • Experience with synthesis, DFT, and logical equivalence checking.
  • Experience with hirify.global tools such as Genus, Innovus, Conformal, Tempus, Modus, and Voltus, or competing tools including ICC, ICC2, DC, and PrimeTime.
  • Experience with advanced nodes of 5nm and below.

Culture & Benefits

  • Direct collaboration with customers and hirify.global R&D.
  • Paid vacation and paid holidays.
  • 401(k) plan with employer match.
  • Employee stock purchase plan.
  • Medical, dental, and vision plan options.

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