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6 дней назад

Senior Applications Engineer – FPGA Tools

148 753$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior Applications Engineer – FPGA Tools (FPGA development tools and design flows): Enabling adoption of FPGA software tools through capability analysis, documentation, training, troubleshooting, and workflow integration with an accent on RTL design, synthesis, place-and-route, and timing closure. Focus on supporting FPGA design flows, resolving Linux and tool-environment issues, and using scripting and AI tools for automation.

Location: LSV. Must be a U.S. person to support the Aerospace and Defense market segment and provide proof of the right to work in the United States.

Base pay: $148753.481 per year. Additional variable or incentive compensation and/or equity may be available.

Company

hirify.global develops low-cost, low-power programmable logic, FPGA, CPLD, and programmable power management solutions for customers worldwide.

What you will do

  • Enable adoption of FPGA software tools by analyzing tool capabilities and user requirements.
  • Prepare tool documentation, usage guidelines, and best practices.
  • Deliver training sessions and user enablement programs.
  • Provide ITAR-compliant support in accordance with export control regulations and internal processes.
  • Collaborate with engineering teams to improve workflows and tool integration.
  • Troubleshoot FPGA development tools and operating-environment issues while supporting customers and internal teams as a subject matter expert.

Requirements

  • U.S. person status and authorization to work in the United States.
  • BSEE or a similar degree.
  • 5+ years of experience with FPGA design tools such as Radiant, Diamond, Quartus, or Vivado.
  • Strong experience with Verilog, VHDL, or SystemVerilog and synthesis tools such as Synplify Pro.
  • Experience with place-and-route, static timing analysis, and timing closure.
  • Solid Linux experience, strong scripting or programming skills, outstanding written and verbal English communication, and the ability to work independently and collaboratively.

Nice to have

  • Experience with ModelSim/QuestaSim, VCS, or Xcelium.
  • Understanding of FPGA architecture and applications.
  • Hands-on FPGA development and verification experience.
  • Experience with TCL, Perl, or Python scripting.
  • Experience with Lattice FPGA design software tools.

Culture & Benefits

  • Fast-paced, results-oriented, team-first working environment.
  • International engineering, design, manufacturing, sales, marketing, and support organization.
  • Comprehensive benefits may include healthcare, retirement plans, and paid time off.
  • Background and reference checks are required.

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