EDA Tools Hardware Engineer

Location: Hybrid role based at an hirify.global site in the United States, with primary location in Santa Clara, California, and additional locations in Folsom, California; Hillsboro, Oregon; and Austin, Texas.

Annual salary: $141,910–$269,100 USD

Company

hirify.global develops semiconductor technologies and hardware products, supporting silicon innovation through advanced design tools, flows, and methodologies.

What you will do

• Develop and maintain full-chip physical implementation flows.
• Define floor planning, partitioning, hierarchical block integration, and chip-level placement and routing strategies.
• Coordinate power grid planning and analysis and integrate clock tree synthesis strategies.
• Enable scalable SoC assembly flows for multi-block and multi-power-domain designs.
• Define methodologies for hierarchical design reuse and integration.
• Collaborate with EDA vendors to help define next-generation design tools and flows.

Requirements

• Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master’s degree with 4+ years; or a PhD with 2+ years.
• Experience with physical design fundamentals, including placement and routing.
• Experience with clock tree synthesis and full-chip integration methodologies using Innovus.
• Experience with large SoC or multi-block design implementation flows.
• Experience with static timing analysis, power grid design, and IR drop concepts is preferred.
• Scripting and automation skills in Linux environments are preferred.

Culture & Benefits

• Hybrid work model combining on-site work at an assigned hirify.global site with off-site work.
• Competitive pay and stock bonuses.
• Health, retirement, and vacation benefits.
• Opportunity to collaborate with EDA vendors and contribute to silicon innovation.