Hardware Design Engineer - 2027 Grads (FPGA/ASIC)

Location: New York, NY, United States

Base salary: 300,000 USD per year, plus discretionary performance-based bonuses and benefits.

Company

hirify.global applies scientific computing and research to algorithmic trading across global financial markets.

What you will do

• Design and deliver high-performance hardware solutions for low-latency trading systems.
• Architect FPGA and ASIC systems and implement market-data transformations and complex models in RTL.
• Describe hardware designs at interface, algorithm, and circuit levels.
• Analyze and resolve hardware problems quickly through debugging and optimization.
• Collaborate with teammates, explore new technologies, and raise the quality of hardware designs.

Requirements

• Currently pursuing a Bachelor's, Master's, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027.
• Proficiency in SystemVerilog and deep knowledge of FPGA internals and/or ASIC technology.
• Strong digital logic design, optimization, debugging, and problem-solving skills.
• Thorough understanding of computer architecture and vendor tool suites.
• Familiarity with C++ and/or Python and comfort working in Linux.
• Previous internship experience in digital logic design.

Nice to have

• Expertise in networking protocols, CPU design, physical design, or machine learning accelerators.

Culture & Benefits

• Collaborative, open, and transparent environment focused on scientific innovation.
• Access to a sophisticated computing environment for research and development.
• Performance-based bonuses and a competitive benefits package.
• Community-oriented workplace with colleagues from diverse technical backgrounds.
• AI tools are prohibited during interviews and assessments unless explicitly permitted.