Назад
Company hidden
4 дня назад

CPU Circuit Design Engineer

141 910 - 269 100$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
CPU Circuit Design Engineer (CPU circuit design and STA): Driving performance verification, circuit quality signoff, and frequency target definition for CPU products with an accent on performance, power, area, and schedule trade-offs. Focus on converging RTL, circuit, and physical design timing targets, correlating pre-silicon and post-silicon results, and debugging circuit marginality in advanced process technologies.

Location: Austin, Texas, United States; hybrid work model with time split between the assigned hirify.global site and off-site work

Annual salary: $141,910–$269,100 USD

Company

hirify.global designs and manufactures silicon products and develops technology for smart, connected devices.

What you will do

  • Drive performance verification methodology and circuit and timing quality signoff for the CPU team.
  • Evaluate new process nodes through circuit simulations and block scaling methods, and recommend CPU frequency targets.
  • Make performance, power, area, and execution-effort trade-offs.
  • Collaborate with RTL, circuit, and design teams to converge on timing targets while maintaining quality and schedule.
  • Own pre-to-post-silicon verification correlation and debug circuit marginality sightings.
  • Demonstrate design ownership and execution in advanced process technologies.

Requirements

  • Bachelor’s degree with 6+ years of experience or master’s degree with 4+ years in electrical engineering, computer engineering, electrical and computer engineering, or a related field.
  • 5+ years of CPU circuit or backend design experience.
  • 5+ years of circuit design and static timing analysis experience.
  • In-depth circuit design knowledge and the ability to make PPA trade-off decisions.
  • In-depth static timing analysis knowledge and understanding of circuit quality signoff criteria for tape-in.
  • Experience guiding post-silicon circuit marginality debugging and handling ambiguous tasks through completion.

Nice to have

  • Experience leading technical teams of 2–3 engineers.
  • Hands-on individual contributor experience with the ability to delegate when necessary.
  • Self-motivated, collaborative working style.

Culture & Benefits

  • Hybrid work model combining on-site and off-site work.
  • Competitive pay and stock bonuses.
  • Health, retirement, and vacation benefits.
  • Work on silicon products and advanced technology development.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →