Principal Engineer, SOC Integration

Location: Daily onsite presence at the San Jose office/headquarters in the United States

Base pay range: $219,000–$351,000 USD per year, with additional incentive opportunities.

Company

hirify.global develops memory and storage technologies, including DRAM, HBM, and NAND Flash, for smartphones, electric vehicles, hyperscale data centers, IoT devices, machine learning, data analytics, and edge computing.

What you will do

• Own the integration of SoCs with multiple high-speed interfaces.
• Review third-party IP, including ARM cores, DDR controllers, and UCIe PHY.
• Integrate third-party IP with system buses, peripherals, and CPU cores.
• Collaborate with architects and verification engineers to ensure sound SoC-level designs.
• Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis.

Requirements

• BS in Computer Engineering, Electrical Engineering, or Computer Science with 20+ years of experience, or an MS with 18+ years of experience.
• Hands-on experience with the ASIC design flow from design through tape-out.
• Experience with commercial UCIe, CPU, Ethernet, and DDR interface IP.
• Knowledge of PPA trade-offs and SoC-level synthesis, timing analysis, lint, and CDC checks.
• Strong knowledge of AMBA bus fabric, ARM CPU cores, and ARM CoreSight debug features.
• Ability to solve problems independently and collaborate effectively in a diverse team.

Culture & Benefits

• Inclusive workplace focused on innovation, collaboration, curiosity, resilience, and adaptability.
• Medical, dental, vision, and 401(k) benefits.
• 4+ weeks of paid time off annually, plus holidays and sick leave.
• Family support benefits, including fertility and adoption stipends, medical travel support, and virtual veterinary care.
• Emotional wellness resources, including confidential therapy sessions.
• Onsite café and gym, virtual fitness classes, charitable giving match, and a flexible work environment within the required onsite arrangement.