Staff Engineer, PCIe PHY/Link Analysis (PCIe)

Location: San Jose, California, United States; up to 25% business travel, including onsite support at customer sites and labs.

Base pay range: $163,000–$253,000 USD per year, plus incentive opportunities.

Company

hirify.global develops technology solutions and enterprise and data center SSD products powered by V-NAND technology.

What you will do

• Analyze the PCIe protocol stack from the Physical Layer through the Data Link and Transaction/Transport Layers in collaboration with hardware teams and external vendors.
• Own LTSSM behavior, link training and equalization sequencing, PCIe enumeration, and configuration-space flows during device bring-up.
• Validate TLP/DLLP handling, flow control, credit management, ordering, ACK/NAK and replay, AER error handling, and end-to-end data integrity.
• Debug and optimize PHY, Link, and Transport issues during bring-up and sustaining stages of NVMe SSD products from Gen1 through Gen7.
• Support PCI-SIG and other industry PHY/Link compliance testing.
• Provide onsite PHY/Link support at customer sites and labs and travel for business as required.

Requirements

• BS in Computer, Electrical, or Electronic Engineering or Computer Science with 8+ years of relevant experience, or MS with 5+ years of relevant experience.
• Deep proficiency with the PCIe protocol across the Physical, Data Link, and Transaction/Transport Layers.
• Hands-on knowledge of LTSSM, link training and equalization, PCIe enumeration, flow control, replay/retry, and AER error handling.
• Working knowledge of PHY operation, including CDR, VGA, CTLE, DFE, FFE, and DSP, sufficient to investigate issues across the PHY/Link boundary.
• Experience with C/C++ for embedded systems, UART/JTAG/ICE debuggers, PCIe protocol analyzers, logic analyzers, and signal analyzers.
• Ability to collaborate effectively in a multifunctional team environment.

Nice to have

• Knowledge of PCIe SI/PI.
• Experience with NVMe, CXL, or SAS/SATA protocols.
• Pre-silicon and post-silicon SoC validation experience.
• Experience with PCIe power management, including ASPM and L1 substates.

Culture & Benefits

• Inclusive workplace focused on innovation, diversity, and employee development.
• Medical, dental, vision, and 401(k) benefits.
• At least four weeks of paid time off, holidays, and sick leave.
• Family, emotional wellness, charitable giving, and fitness benefits, including an onsite café and gym.
• Flexible work environment and incentive opportunities based on individual and company performance.