22 часа назад
Principal Engineer, Physical Design (Semiconductor)
156 400 - 231 440$
Мэтч & Сопровод
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Описание вакансии
Текст:
TL;DR
Principal Engineer, Physical Design (Semiconductor): Architecting physical design methodologies and automation flows for next-generation, high-performance processor chips in leading-edge CMOS technology, with an accent on RTL-to-GDSII implementation, timing closure, and scalable implementation. Focus on solving complex physical design challenges, evaluating EDA tools, and leading cross-functional methodology development for server, 5G/6G, and networking applications.
Location: Austin, TX, United States
Salary: $156,400–$231,440 per year, plus eligibility for bonus and equity plans.
Company
develops semiconductor solutions and data infrastructure technologies for enterprise, cloud, AI, carrier, server, 5G/6G, and networking applications.
What you will do
- Architect and lead next-generation physical design methodologies and automation flows.
- Provide technical leadership across RTL-to-GDSII implementation, including synthesis, floorplanning, place and route, clock tree synthesis, and timing closure.
- Advise multiple projects, influence design decisions, and resolve complex implementation challenges.
- Collaborate with RTL, verification, CAD, and global cross-functional teams.
- Mentor engineers and promote physical design best practices.
- Evaluate and drive adoption of emerging EDA tools and technologies with internal CAD teams and external vendors.
Requirements
- Bachelor’s, Master’s, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- 10+ years of progressive experience in back-end physical design and verification, including leadership experience.
- Deep understanding of RTL-to-GDSII flows, synthesis, place and route, clock tree synthesis, and timing closure.
- Expertise in static timing analysis and power/signal integrity tools, including PrimeTime, Tempus, Voltus, or RedHawk.
- Proficiency in Python, Perl, Tcl, and Makefile for automation and flow development.
- Applicants must be eligible to access export-controlled technology under U.S. regulations; an export license review may be required.
Nice to have
- Experience working with EDA vendors and evaluating new tools and technologies.
Culture & Benefits
- Work with local and global teams on advanced processor and ASIC designs.
- Employee stock purchase plan with a two-year lookback.
- Bonus and equity plans, including new-hire equity grants and annual equity refreshers.
- Family support programs, mental health resources, and comprehensive health and financial benefits.
- Recognition and service awards.
Hiring process
- Interviews evaluate individual experience, thought process, and communication skills in real time.
- AI tools, transcription apps, automated answer generators, and automated note-taking bots are not permitted during interviews.
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