Назад
Company hidden
2 дня назад

Senior CPU Physical Design Engineer (AI)

164 470 - 269 100$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Senior CPU Physical Design Engineer (Semiconductors): Driving physical implementation and optimization of high-performance CPU designs with an accent on RTL-to-GDS workflows, timing analysis, and power efficiency. Focus on building advanced processor technologies for data center and AI-driven products while collaborating with cross-functional teams to solve complex microarchitecture challenges.

Location: Must be based in Austin, Texas (On-site)

Salary: $164,470–$269,100 USD

Company

hirify.global is a global leader in semiconductor technology, developing innovative processor solutions that power billions of devices worldwide.

What you will do

  • Perform physical design implementation for custom CPUs, transforming RTL into manufacturing-ready databases.
  • Execute full physical design flows including floor planning, synthesis, place and route, and clock tree synthesis.
  • Conduct comprehensive verification and signoff processes such as static timing analysis and layout verification.
  • Collaborate with architecture, logic, and circuit teams to optimize microarchitectures for power, area, and frequency.
  • Develop and refine physical design methodologies and flow automation to enhance efficiency.
  • Work with EDA vendors to improve tool capabilities for high-speed, low-power CPU synthesis.

Requirements

  • Must be authorized to work in the US (no immigration sponsorship provided).
  • Bachelor's degree with 6+ years, Master's with 4+ years, or PhD with 2+ years of relevant experience.
  • Proficiency in physical design EDA tools like Synopsys Fusion Compiler or Cadence Innovus.
  • Experience with scripting languages such as TCL, Perl, or Python for automation.
  • Proven track record of completing at least one tape-out on advanced process nodes.
  • Experience with RTL-to-GDS automation and AI/ML-based place-and-route methods.

Nice to have

  • Expertise in low-power design techniques and multiple power domains (UPF).
  • Deep understanding of CMOS process technology and digital design fundamentals.
  • Experience with thermal and power reduction techniques in APR.

Culture & Benefits

  • Competitive total compensation package including stock bonuses.
  • Comprehensive health, retirement, and vacation benefit programs.
  • Opportunity to work on industry-leading technologies and next-generation CPU products.
  • Collaborative environment with global engineering teams.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →