Senior Engineer I - ASIC Verification

Location: Penang, Malaysia

Company

hirify.global develops semiconductor technology and products that power embedded and connected systems worldwide.

What you will do

• Develop and maintain SystemVerilog UVM verification environments for DDR4/DDR5 memory controller and PHY IP.
• Define verification plans, design testbenches, and create directed and constrained-random test cases and sequences.
• Verify DDR protocol features, including read/write operations, refresh, training, and power-down modes.
• Validate ECC, parity, command/address/data integrity, protocol correctness, and performance through scoreboards, assertions, checkers, and coverage analysis.
• Integrate AXI and APB VIPs, debug RTL and simulation failures with waveform analysis, and root-cause functional and timing issues in RTL and GLS.
• Collaborate with design, post-silicon, and firmware teams; mentor verification engineers and drive verification best practices.

Requirements

• B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering.
• 10+ years of experience in SoC or IP-level verification, preferably with memory subsystems.
• Strong knowledge of DDR protocols and JEDEC specifications, including memory controller architecture and timing parameters.
• Hands-on experience with SystemVerilog, UVM, verification methodology, AXI, assertions, scoreboarding, and functional coverage.
• Experience with Synopsys VCS, Cadence Xcelium, or Mentor Questa simulation tools.
• Strong analytical, debugging, communication, collaboration, and leadership skills, with the ability to work independently.

Nice to have

• Familiarity with gate-level simulation, Python scripting, and AI/LLM-assisted workflows for root-cause analysis and triage.

Culture & Benefits

• Full-time position within a global semiconductor organization.
• Culture emphasizing trust, empowerment, respect, diversity, communication, and community.
• Employee development supported through leadership and career growth programs.
• Travel requirement of 0%–25%.