Senior Verification Engineer (AI)

Location: Ramat Gan, Israel; on-site

Company

Develops automotive technologies for accident prevention and semi- and fully autonomous vehicles, including AI-powered EyeQ chips.

What you will do

• Define, implement, and enhance unit-level verification environments using UVM methodology.
• Write and debug tests combining UVM methodology with embedded software code.
• Define coverage measures and apply coverage-driven verification practices.
• Integrate industry-standard protocols such as AXI and OCP, along with third-party VIPs.
• Collaborate with designers, architects, and software developers across the Haifa and Jerusalem teams.
• Debug waveforms with EDA tools and independently identify root causes of bugs.

Requirements

• BSc in electrical engineering, computer engineering, or computer science.
• 8+ years of experience developing verification environments, tests, and test benches.
• SystemVerilog skills, preferably with OVM or UVM.
• Embedded software experience and C/C++ skills.
• Experience defining test plans and implementing coverage-driven verification.
• Experience testing integrations with third-party IPs.

Nice to have

• Perl or Python scripting skills.
• Knowledge of industry-standard protocols such as AXI, OCP, or APB.

Culture & Benefits

• Full-time employment in an on-site R&D hardware environment.
• Work with hardware, architecture, and software engineering teams on future autonomous-vehicle chips.
• Hiring processes may use AI-supported application and assessment tools, with final decisions made by people.