Physical Design Intern

Location: Petah-Tikva, Israel

Company

hirify.global develops semiconductor solutions and data infrastructure technologies for enterprise, cloud, AI, carrier, automotive, and networking applications.

What you will do

• Implement future routing devices in the switching department.
• Work on physical design and methodology for next-generation processor and ASIC designs.
• Use industry-standard tools to work with large and complex ASICs.
• Contribute to designs based on leading-edge CMOS process technology.

Requirements

• Be a third- or fourth-year EE or CS student.
• Demonstrate strong interpersonal and communication skills.
• Work independently, manage tasks effectively, and learn quickly.
• Bring innovative thinking and strong technical and analytical capabilities.

Nice to have

• Knowledge of logic design and verification.
• Programming experience with Verilog, VHDL, or TCL.
• Experience developing workflow and automation infrastructure.
• Experience with commercial EDA vendors and tools.

Culture & Benefits

• Collaborative, transparent, and inclusive work environment.
• Opportunities to learn, develop, and work on purposeful semiconductor innovation.
• Eligibility for bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
• Resources and support for professional success and growth.

Hiring process

• Interviews evaluate individual experience, thought process, and communication skills in real time.
• AI tools, transcription applications, automated answer generators, and note-taking bots are not permitted during interviews.
• The role may require export license review before employment for access to export-controlled technology or software.