Analog and Mixed Signal Design Engineer (PVT Monitoring IP)

Location: Chandler, Arizona, United States; onsite

Annual base salary: USD 109,700–175,500

Company

hirify.global’s Central Engineering Group develops advanced semiconductor technologies and on-die process, voltage, and temperature monitoring IP.

What you will do

• Design schematic architectures for analog and mixed-signal blocks, including bandgaps, ADCs, DACs, voltage regulators, comparators, and GPIOs.
• Supervise layout design and perform post-layout validation using SPICE simulations.
• Build behavioral and gate-level IP models and validate functionality through Verilog simulations.
• Create standard EDA tool views, including timing models, and write datasheets and technical integration documents.
• Establish post-silicon testing guidelines, oversee validation, and analyze test data.

Requirements

• MS or PhD in Electrical Engineering.
• 6+ years of mixed-signal and analog design experience.
• Deep knowledge of gain, bandwidth, stability, device physics, circuit reliability, process variation, and statistical analysis of Monte Carlo simulation results.
• Strong understanding of layout effects on circuit performance.
• Familiarity with Verilog modeling, digital circuits, and standard digital implementation flows.
• Proficiency with Cadence Virtuoso and simulation platforms such as Spectre, HSPICE, or PrimeSim.
• Experience with Synopsys PrimeTime and Verilog simulators such as Xcelium or VCS.
• Excellent communication and teamwork skills, with the ability to independently navigate complex, new, or unfamiliar engineering challenges.

Nice to have

• Experience building and delivering mixed-signal IPs.
• Familiarity with laboratory testing methodologies and common bench equipment.
• Proficiency in Python, Perl, or SKILL for design and verification automation.
• Familiarity with ESD and latch-up design rules.
• Silicon failure analysis and debugging skills.

Culture & Benefits

• Full-time employment with medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Discretionary annual bonus and new-hire and annual equity awards, subject to plan documents and award agreements.
• Company-paid holidays, paid sick leave, vacation time, paid family leave, and other applicable leaves of absence.
• Equal opportunity employment is provided in accordance with applicable federal, state, and local laws.

Hiring process

• Create a candidate login account before applying if using the system for the first time; existing candidates must sign in before applying.
• Applicants located outside the United States should provide a home address for future correspondence.