signal integritypower integrityspicecadencespectrevirtuosohspiceams verificationams designerquesta adms
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Роль четко определена с ясным акцентом на верификацию AMS для продвинутых SoC, а компания предлагает хорошие возможности для роста и поддерживающую культуру, но зарплата не указана, что может вызывать беспокойство.
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Зарплата не указанаСильная корпоративная культураЧеткое определение ролиВозможности роста
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Текст:
Hirify AI/Оригинал
TL;DR
Technical Staff Engineer - AMS Verification (Analog Mixed-Signal): Leading system-level AMS verification and Power Integrity/Signal Integrity analysis for next-generation SoCs and chiplet-based platforms with an accent on SPICE simulation, cross-node integration, and multi-voltage power domains. Focus on verifying chiplet interfaces, developing multi-die verification flows, and correlating simulation results with silicon behavior.
Location: Chandler, Arizona, United States. Onsite role with 0–25% travel; physical work includes 90% sitting and 10% standing/walking.
Company
hirify.global is a global semiconductor technology company developing products and solutions that power electronic systems.
What you will do
Lead and contribute to subsystem- and chip-level AMS and SPICE simulations for complex SoCs and multi-die chiplet architectures.
Drive AMS verification across chiplet boundaries, including integration of mature analog IP with advanced digital nodes such as 12nm and beyond.
Collaborate with SoC design, architecture, analog, and advanced-node digital implementation teams.
Review SoC specifications, IO subsystems, and die-to-die interface requirements, and plan full-chip and chiplet-level simulation strategies.
Perform PI/SI simulations across die pad rings, packages, interposers, and applicable PCB interfaces, including multiple power domains.
Develop AMS and PI/SI methodologies and flows, and partner with validation teams on silicon bring-up, debug, and simulation-to-silicon correlation.
Requirements
Bachelor’s or Master’s degree in electrical engineering or equivalent, with 14+ years of experience.
Proven AMS verification experience for advanced SoCs, including exposure to 12nm nodes or beyond.
Solid understanding of cross-domain interactions and multi-voltage/power domains.
Hands-on experience with Cadence Virtuoso, Spectre, and AMS Designer; Questa ADMS or Symphony; and HSPICE or an equivalent tool.
Experience with silicon debug and correlating simulation results with silicon behavior.
Ability to analyze and interpret chip-level electrical specifications and IO requirements.
Strong communication skills and ability to work effectively in a global, cross-functional environment.
Nice to have
Experience with chiplet architectures or multi-die system integration.
Exposure to die-to-die interfaces and advanced-node integration challenges at 12nm and beyond.
Experience in circuit-level debug and modeling.
Culture & Benefits
Full-time employment at a global organization with approximately 17,000 employees.
Culture focused on trust, empowerment, respect, diversity, communication, employee development, and community.
Career development through Leadership Passage Programs and other employee development initiatives.
Values-based decision making and a strong focus on workplace excellence.
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