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6 дней назад

Technical Staff Engineer – Analog Design (Networking)

Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Technical Staff Engineer – Analog Design (Networking) (Analog IC/SERDES): Designing and developing analog and mixed-signal integrated circuits for next-generation Ethernet and USB products with an accent on high-speed Datacom SERDES architecture, transistor-level design, and mixed-mode verification. Focus on architecting SERDES macros, mitigating parasitic effects, developing behavioral models, and validating silicon through ATE and laboratory testing.

Location: Chandler, Arizona, United States

Company

hirify.global is a large semiconductor technology company developing products and solutions for networking, connectivity, and other electronic systems.

What you will do

  • Define architectures for high-speed Datacom Ethernet and USB SERDES.
  • Translate system requirements into block-level specifications and microarchitectures.
  • Design and verify analog and mixed-signal macros, including ADCs, DACs, PLLs, transmitters, receivers, regulators, high-speed I/Os, and power-management blocks.
  • Perform system- and transistor-level simulations across process corners, mismatch conditions, and multiple operating scenarios.
  • Develop schematics, behavioral models, design specifications, validation plans, and technical documentation using Cadence Virtuoso and related tools.
  • Collaborate with layout, applications, product, test, systems, CAD, and technology development teams; lead design reviews and support post-silicon validation.

Requirements

  • BSEE degree and at least 15 years of industry experience in electronics or electrical engineering.
  • Extensive analog and mixed-signal IC design experience, including multiple analog SERDES sub-blocks.
  • Experience architecting high-speed interfaces such as Ethernet and USB; PCIe experience is also relevant.
  • Proficiency with Cadence Virtuoso and analog/mixed-signal design, verification, and physical-analysis tools including DRC, LVS, ERC, PEX, and EM analysis.
  • Strong knowledge of device physics, low-power and high-speed design techniques, SOA, aging, and SHE effects.
  • Experience with laboratory validation equipment, Unix/Linux, and scripting languages such as Scheme, SKILL, Perl, or Tcl.

Culture & Benefits

  • Full-time position within a 17,000-member global organization.
  • Culture emphasizing trust, empowerment, respect, diversity, communication, and employee development.
  • Leadership development programs and opportunities for career growth.
  • Travel requirement of 0%–25%.
  • Work is performed indoors, primarily seated, with collaboration across globally distributed design teams.

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