Technical Lead Package Platform Engineer (FCBGA)

Location: San Jose, California, United States

Base salary: $160,000–$200,000 per year, depending on experience, level, and business need. The role may also be eligible for discretionary bonus, incentives, and benefits.

Company

hirify.global develops rack-scale AI infrastructure and semiconductor-based connectivity solutions integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink with its COSMOS software suite.

What you will do

• Lead FCBGA package NPI development from package definition and die netlist through design, assembly development, qualification, production release, and high-volume manufacturing.
• Provide technical leadership for FCBGA assembly manufacturing processes and laminate substrate technologies.
• Manage execution with substrate suppliers and assembly OSAT partners, including schedules, quality, manufacturing readiness, yield improvement, and issue resolution.
• Lead technical project management, risk assessment, milestone tracking, escalation, and cross-functional execution.
• Plan package and system-level reliability assessments and qualification activities, including for large-body FCBGA packages.
• Investigate customer returns and field quality issues through root cause analysis, failure analysis, containment, corrective actions, and recurrence prevention; contribute to CPO and NPO packaging technologies.

Requirements

• Bachelor’s degree or higher in a related field.
• At least 5 years of professional experience in electronic packaging.
• Strong experience with FCBGA assembly manufacturing processes, laminate substrate technologies, and advanced flip-chip package NPI from early definition through qualification and production release.
• Experience implementing packages from die netlist through flip-chip package design and manufacturing.
• Experience managing substrate suppliers and assembly OSAT partners, including technical execution, quality, schedules, and manufacturing readiness.
• Strong technical project management, cross-functional collaboration, problem-solving, root cause analysis, failure analysis, and customer quality issue resolution skills.

Nice to have

• Experience with Cadence Allegro Package Designer or equivalent package design tools.
• Knowledge of FCBGA reliability mechanisms, test methodologies, and qualification requirements.
• Experience developing qualification plans and performing system-level reliability assessments for large-body FCBGA packages.
• Subject-matter expertise in CPO or NPO and package or substrate warpage characterization, modeling, material interactions, and assembly process impacts.

Culture & Benefits

• Opportunity to work on rack-scale AI infrastructure and advanced semiconductor connectivity solutions.
• Collaboration across package design, product engineering, program management, quality, marketing, and external supplier teams.
• Bonus, incentives, and benefits may be available in addition to the base salary.
• The company encourages applications from candidates with diverse backgrounds and experiences.