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5 дней назад

Senior FPGA Engineer (Fintech)

225 000 - 325 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
UK/US/Europe +1 еще
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior FPGA Engineer (Fintech): Building low-latency, high-throughput FPGA applications for trading teams with an accent on RTL design, hardware-software interaction, and complete FPGA development flows. Focus on architecting systems from requirements to production, evaluating hardware limitations, and debugging and characterizing new hardware.

Location: Chicago, New York, or London

Annual base salary: $225,000–$325,000, plus an annual discretionary bonus.

Company

hirify.global is a diversified trading firm using proprietary technology and capital to operate across global financial markets and non-traditional strategies including real estate, venture capital, and cryptoassets.

What you will do

  • Architect and implement FPGA applications from the ground up, including synthesis, place and route, static timing analysis, and documentation.
  • Develop low-latency, high-throughput FPGA designs across the full development lifecycle.
  • Research and evaluate FPGA hardware and emerging technologies.
  • Design creative solutions to overcome FPGA and hardware limitations.
  • Collaborate directly with software and other design teams.
  • Debug and characterize new hardware in the lab.

Requirements

  • Bachelor’s degree or higher in Computer or Electrical Engineering, with 3+ years of relevant experience; a Master’s degree or higher may count toward experience.
  • Strong hardware engineering experience, particularly with FPGA technology.
  • Ability to lead FPGA projects autonomously from system requirements through production.
  • Strong RTL logic design and verification skills, including 2+ years of Verilog experience.
  • Required experience with FPGA design flows, system-on-chip architectures, memory and processor subsystems, networking, and peripheral interconnect.
  • Knowledge of TCP/IP and practical experience with either Xilinx or Altera FPGA design flows.

Nice to have

  • Functional verification experience using high-level methodologies such as SystemVerilog.
  • Excellent research and data-gathering skills.

Culture & Benefits

  • Autonomous environment with high expectations, integrity, curiosity, and openness to challenging consensus.
  • Medical, pharmacy, dental, and vision insurance.
  • 401(k) with discretionary employer match.
  • Short- and long-term disability, life, and AD&D insurance.
  • Health savings accounts and flexible spending accounts.

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