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6 дней назад

Senior/Staff Design Engineer (RISC-V)

69 000 - 202 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior/Staff Design Engineer (RISC-V): Developing and owning RTL for an AI-enabled RISC-V CPU core with an accent on vector CPU design, custom extensions, matrix engines, and power-performance-area optimization. Focus on microarchitecture research, high-performance execution strategies, functional verification support, and validating physical design constraints across a multifunctional engineering team.

Location: Santa Clara, United States

Salary: $69,000–$202,000 per year; exact salary depends on qualifications, experience, and location.

Company

hirify.global is a semiconductor foundry providing chip design, development, and fabrication services, including RISC-V CPU IP and AI-enabled processors.

What you will do

  • Drive the microarchitecture and RTL design of critical blocks for an AI-enabled RISC-V CPU core.
  • Design RISC-V vector CPU functionality, custom extensions, and an AI-enabled matrix engine.
  • Explore high-performance CPU strategies with the modeling team.
  • Develop microarchitecture specifications from early architectural exploration through detailed design.
  • Refine RTL to meet power, performance, area, timing, reliability, testability, and security goals.
  • Support functional verification and collaborate with cross-functional engineering teams on physical design validation.

Requirements

  • Knowledge of pipeline stages in in-order or out-of-order high-performance CPU cores.
  • Knowledge of microprocessor architecture, including areas such as instruction fetch and decode, branch prediction, scheduling, register renaming, execution units, load/store execution, prefetching, vector datapaths, caches, and memory subsystems.
  • Knowledge of SystemVerilog, Verilog, and/or VHDL.
  • Experience with simulators and waveform debugging tools.
  • Knowledge of logic design principles and their timing and power implications.
  • Bachelor's degree with 3–7 years of experience or Master's degree with 2–5 years of experience.

Nice to have

  • Experience designing RISC-V, ARM, or MIPS CPUs.
  • Experience with hardware multithreading, virtualization, SIMD, vector, or matrix-enabled CPU designs.
  • Understanding of high-performance and low-power CPU microarchitecture techniques.
  • Experience with Perl or Python scripting.
  • Knowledge of cache coherency, memory consistency, SoC-level CPU integration, or safety and security microarchitecture.

Culture & Benefits

  • Full-time employment with a semiconductor technology company.
  • Commitment to equal opportunity and workplace diversity.
  • Reasonable accommodations are available during the employment process upon request.
  • Employment is subject to applicable pre-employment conditions and laws.

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