Verification Engineer (ASIC)

Location: San Jose, California, United States

Annual base salary: USD 121,900–195,000, plus discretionary bonus and equity awards.

Company

hirify.global’s ASIC Product Division develops technology platforms and intellectual property for cloud AI engines, supercomputers, networking, wireless solutions, and other ASIC applications.

What you will do

• Develop and execute verification plans for IP blocks at block and system levels.
• Build and maintain SystemVerilog/UVM-based verification environments and testbenches.
• Develop Python behavioral models and validate them against RTL implementations.
• Analyze simulation results, debug failures, and drive root-cause resolution.
• Collaborate with design, architecture, and verification teams to ensure design quality.
• Maintain automation scripts and regression frameworks while improving verification methodologies and flows.

Requirements

• Bachelor’s degree in Electrical or Electronic Engineering, Computer Science, or a related field.
• 8+ years of relevant industry experience.
• Strong expertise in RTL verification methodologies and SystemVerilog.
• Experience with ASIC verification flows, block-level and system-level verification, and design verification methodologies.
• Proficiency in UVM/OVM, Python, C/C++, and scripting.
• Strong debugging, problem-solving, communication, and teamwork skills.

Nice to have

• Firmware development or embedded C experience.
• Knowledge of PHY layers, adaptation techniques, CPU, DDR, bus, network protocols, or DSP design.
• Familiarity with formal verification methodologies and chip design flows and tools.
• Experience with AI-assisted development tools.

Culture & Benefits

• Medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Company-paid holidays, paid sick leave, vacation time, and applicable family leave.
• Annual bonus, competitive new-hire equity grants, and annual equity awards.