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Lead Fab Technology Engineer, Surface Preparation and Integration (Semiconductors)

Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
Japan
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
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TL;DR
Lead Fab Technology Engineer, Surface Preparation and Integration (Semiconductors) (Selective Wet Etch and Clean): Leading customer evaluations, technical support, product commercialization, and market growth for surface preparation and integration material solutions in Asia with an accent on advanced wafer fabrication, customer qualification, and technical leadership. Focus on developing wet etch and clean processes, collaborating with equipment OEMs and R&D teams, and aligning product roadmaps with semiconductor industry requirements.

Location: Minato-ku, Tokyo, Japan; travel within Japan and to global locations as needed, up to 30%.

Company

hirify.global develops material solutions for semiconductor manufacturing and supports customer process adoption and commercialization.

What you will do

  • Act as the technical expert for Selective Wet Etch and Clean processes in Surface Preparation and Integration across Asia.
  • Lead customer evaluations, qualifications, product presentations, and technical discussions with account managers.
  • Develop strategies to grow revenue and market share for SPI material solutions.
  • Identify and prioritize customer opportunities using the value selling process.
  • Collaborate with equipment OEMs, R&D, business units, supply chain, quality, and account management teams.
  • Manage customer process and product knowledge, support product positioning and lifecycle management, and contribute to technical roadmaps.

Requirements

  • Bachelor’s degree in chemistry, chemical engineering, materials science, or engineering with 10+ years of Wet Etch and Clean experience in semiconductor processing, fab environments, or equipment/material suppliers.
  • Alternatively, a master’s degree or PhD in a relevant field with 8+ years of Wet Etch and Clean experience.
  • Extensive experience in Wet Etch and Clean process development in an advanced wafer fab environment, including advanced logic or memory vertical/3D architectures, or at a semiconductor equipment company.
  • Strong analytical problem-solving, communication, teamwork, and technical presentation skills.
  • English-speaking and presentation skills are required; TOEIC >600 is preferred.
  • The position is specific to Tokyo or nearby areas in Japan.

Nice to have

  • Experience with surface analytical techniques.
  • Sales or management experience.

Culture & Benefits

  • Self-directed work with minimal supervision.
  • Collaboration with regional and global SPI leadership and functional teams.
  • Regular customer engagement and participation in regional and global opportunity reviews.
  • International travel and exposure to semiconductor customers, equipment OEMs, and product development teams.

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