Senior CPU RTL Design Engineer (CPU)

Location: Hybrid role based at an hirify.global site in Austin, Texas, or Phoenix, Arizona, United States

Annual salary: $141,910–$269,100 USD

Company

hirify.global develops semiconductor technologies and high-performance computing products.

What you will do

• Develop, simulate, debug, and optimize CPU RTL and logic designs.
• Define CPU architecture and microarchitecture features and document microarchitectural specifications.
• Optimize designs for power, performance, area, and timing, including energy-efficient and high-frequency logic.
• Ensure design integrity for physical implementation through appropriate design strategies, tools, and methods.
• Review verification plans, resolve failing RTL tests, and collaborate with verification and validation teams.
• Work with architecture, physical design, SoC integration, methodology, and SoC customer teams to deliver high-quality CPU blocks.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field with 7+ years of relevant experience, or a master’s degree with 5+ years of experience.
• 7+ years of RTL design experience using SystemVerilog, including hardware modeling and logic debug environments.
• 5+ years of experience with energy-efficient, low-power, clock-domain crossing, and power-aware design methods.
• 3+ years of scripting experience with TCL, Perl, or Python.
• Experience with CPU architecture, high-speed circuit design, datapaths, arrays, timing convergence, static timing analysis, UPF, and lint checks.
• Ability to work in a hybrid model from an assigned hirify.global site in the United States.

Nice to have

• PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 2+ years of experience.
• Knowledge of CPU power management, including electrical budgeting, dynamic voltage and frequency scaling, thermal management, P/C states, and reset sequence handling.
• Knowledge of hirify.global Architecture ISA, system architecture, and x86 assembly language.

Culture & Benefits

• Competitive pay and stock bonuses.
• Health, retirement, and vacation benefits.
• Hybrid work model combining on-site and off-site work.
• Cross-functional collaboration across CPU architecture and engineering disciplines.