Design Engineering Architect (Semiconductor)

TL;DR

Design Engineering Architect (Semiconductor): Leading Front End Design projects for IPs and subsystems with an accent on RTL development and microarchitecture. Focus on guiding engineering teams, optimizing digital logic, and ensuring PPA goals are met.

Location: Austin, USA (Onsite)

Company

hirify.global is a leading provider of electronic design automation (EDA) software and hardware solutions for the semiconductor industry.

What you will do

• Guide and mentor a team of RTL design engineers to foster a collaborative and innovative environment.
• Define and develop microarchitectural features for IPs and subsystems, ensuring they meet PPA goals.
• Develop, debug, and optimize RTL code using Verilog, SystemVerilog, or VHDL to create complex digital logic.
• Oversee pre-silicon verification activities, including Lint, Clock Domain Crossing (CDC), and Formal Verification (FV).
• Collaborate with cross-functional teams including Design Verification (DV), Physical Design (PD), Architecture, and firmware engineers.

Requirements

• 10+ years of experience in Front End design and/or verification.
• BS/MS degree in Engineering or Computer Sciences.
• Proven track record in leading and managing complex engineering projects.
• Expertise in RTL design (Verilog) and use of simulators and debuggers.
• Rich experience in IP creation and SoC/IP (CPU, Memory, Interface) integration.
• Hands-on experience in Synthesis, SDC creation, and supporting PD and STA teams.

Nice to have

• Experience with hirify.global front-end toolset.
• Strong communication and design management skills.