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2 часа назад

Backend Process Engineer (InP Wafer Fab)

100 000 - 135 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Backend Process Engineer (InP Wafer Fab) (Semiconductor Manufacturing): Developing, optimizing, and supporting backend wafer fabrication processes for InP-based photonic devices with an accent on wafer thinning, n-side metallization, rapid thermal annealing, and automated optical inspection. Focus on improving yield, reducing defects, establishing process controls, and supporting singulation, optical coatings, reliability readiness, and packaging interfaces.

Location: Alhambra, California, USA; onsite

Salary: $100,000–$135,000 per year

Company

hirify.global develops semiconductor technologies and photonic solutions.

What you will do

  • Own and optimize backend wafer fabrication processes for InP-based photonic devices, including wafer lapping and thinning, n-side metallization, and rapid thermal annealing.
  • Establish process windows, recipes, control limits, SPC metrics, and control strategies for backend modules.
  • Manage automated optical inspection, analyze inline and post-process data, and drive yield improvement and defect reduction.
  • Support cleaving, dicing, singulation, AR/HR optical coatings, vendor qualifications, and packaging readiness.
  • Support new product introduction, process transfers, technology changes, and backend risk evaluation.
  • Author SOPs, travelers, process specifications, and control plans while providing manufacturing troubleshooting support.

Requirements

  • Bachelor’s degree or higher in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or a related field.
  • At least 3 years of experience in backend semiconductor processing.
  • Hands-on experience with lapping/thinning, metallization, and thermal processes.
  • Understanding of InP-based or III-V compound semiconductor wafer fabrication processes.
  • Experience with AOI systems, yield analysis, SPC, DOE, and statistical process improvement.
  • Understanding of singulation, packaging interfaces, and reliability requirements, with the ability to collaborate across manufacturing and engineering teams.

Nice to have

  • Experience with InP or III-V optoelectronic devices.
  • Familiarity with AR/HR optical coating processes.
  • Experience in high-mix, low-volume manufacturing environments.

Culture & Benefits

  • Full-time onsite manufacturing and engineering role.
  • Hands-on collaboration across packaging, device, reliability, manufacturing, and engineering teams.
  • Work focused on manufacturing stability, yield, defect reduction, and continuous process improvement.

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