Backend Process Engineer (InP Wafer Fab): Developing, optimizing, and supporting backend wafer fabrication processes for InP-based photonic devices with an accent on wafer thinning, metallization, thermal processing, AOI, and singulation yield. Focus on analyzing process data, reducing defects, establishing process controls, and supporting packaging readiness, NPI, and manufacturing stability.
Location: Alhambra, California, United States; onsite
Salary: $100,000–$135,000 per year
Company
hirify.global develops semiconductor and photonic technologies, including InP-based photonic devices and related manufacturing solutions.
What you will do
Own and optimize backend wafer fabrication processes for InP-based photonic devices, including lapping/thinning, n-side metallization, and rapid thermal annealing.
Establish process windows, recipes, control limits, SPC metrics, and control strategies while maintaining stable manufacturing performance.
Own automated optical inspection processes and improve singulation yield through data analysis, defect reduction, root-cause investigations, and corrective and preventive actions.
Support cleaving, dicing, singulation, AR/HR optical coatings, vendor qualifications, packaging interfaces, and reliability readiness.
Support new product introduction, process transfers, technology changes, and assessment of backend process risks for new designs, materials, and device structures.
Author and maintain SOPs, travelers, process specifications, and control plans, while providing hands-on manufacturing and troubleshooting support.
Requirements
Bachelor’s degree or higher in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or a related field.
At least 3 years of experience in backend semiconductor processing.
Hands-on experience with lapping/thinning, metallization, and thermal processes.
Understanding of InP-based or III-V compound semiconductor wafer fabrication processes.
Experience with AOI systems, yield analysis, and data-driven process improvement.
Strong understanding of singulation, packaging interfaces, and reliability requirements.
Proficiency in SPC, DOE, and statistical analysis.
Ability to work across cross-functional manufacturing and engineering teams.
Nice to have
Experience with InP or III-V optoelectronic devices.
Hands-on involvement in manufacturing, process troubleshooting, and continuous improvement.
Cross-functional collaboration with packaging, device, reliability, manufacturing, and engineering teams.
Base salary range of $100,000–$135,000 per year, determined by qualifications, skills, education, experience, location, and other compensation factors.
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