process engineeringsemiconductorfailure analysisspcdoejmpadvanced packaginghybrid bondingplasma activation
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Выше среднего
$147к-203к/год
$130к$150кмедиана$170к
По похожим ролям (50) ~ $150к/год
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Process Engineer (Die to Wafer Hybrid Bonding) (Semiconductor/Advanced Packaging): Developing and optimizing die-to-wafer hybrid bonding processes for 2.5D/3D advanced packaging with an accent on surface preparation, plasma activation, die alignment, and post-bond characterization. Focus on designing DOE-driven experiments, analyzing bond failures, integrating adjacent process modules, and improving process control for next-generation semiconductor manufacturing.
Location: Santa Clara, CA; onsite work at the Santa Clara headquarters; travel required up to 10% of the time; relocation eligible.
Salary: $147,000.00–$202,500.00 per year.
Company
hirify.global develops materials engineering solutions and equipment used in semiconductor and display manufacturing, including technologies for advanced packaging.
What you will do
Develop die-to-wafer hybrid bonding processes, including surface preparation, plasma activation, high-accuracy die placement and alignment, and post-bond characterization.
Integrate die-to-wafer bonding with dicing and die preparation, die thinning, inter-die gap fill, and planarization modules.
Design and execute DOE-driven experiments to evaluate process limits, sensitivities, and trade-offs.
Optimize processes, perform failure analysis and characterization, and drive continuous engineering improvements.
Collect and analyze data, characterize hardware, troubleshoot engineering issues, measure film properties, and generate technical documentation.
Collaborate with customers, vendors, suppliers, and multidisciplinary R&D teams on advanced packaging technology development.
Requirements
Ph.D. or M.S. in Materials Science, Electrical Engineering, Applied Physics, or a related STEM discipline.
In-depth knowledge and hands-on experience in one or more of the following: die-to-wafer or wafer-to-wafer hybrid bonding; thin die handling and alignment-critical processes; Micro-LED or CPO; heterogeneous integration such as III-V to silicon or novel materials to silicon 2.5D/3D integration; or direct process engineering on mainstream semiconductor equipment such as plasma, wet clean, or overlay/alignment systems.
Strong understanding of bond interface physics, alignment and overlay fundamentals, and the mechanical behavior of thin and fragile dies.
Proficiency in statistical analysis and process control, including DOE, SPC, and JMP.
Strong problem-solving skills and the ability to work independently and collaboratively with minimal supervision.
Strong communication and interpersonal skills for effective collaboration across multidisciplinary teams.
Culture & Benefits
Hands-on training and experience with state-of-the-art equipment, including a fully integrated die-to-wafer hybrid bonding system.
Opportunity to collaborate with R&D teams on 2.5D/3D advanced packaging research and development.
Supportive work culture focused on learning, development, and career growth.
Comprehensive employee health and wellbeing programs and benefits.
Eligible candidates may receive bonus and stock award compensation, as applicable.
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