Principal Analog IC Design Engineer (High Speed SerDes)
Контакты
136 500 - 253 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
cadmixed signalserdesjittercmosanalog ic designhigh speed i osignal equalization
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
Средняя
$137к-254к/год
$160к$190кмедиана$210к
По похожим ролям (50) ~ $190к/год
На СНГ рынке: $1.9к/мес ($1.8к - $2.5к)
92
Крутая вакансия
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Престижная роль в компании-лидере индустрии с четким кругом задач и зарплатой, соответствующей мировому рынку.
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Principal Analog IC Design Engineer (High Speed SerDes): Designing and developing analog and mixed-signal IC circuit blocks from initial concept and specification through final verification, with an accent on CMOS SerDes, high-speed I/O, jitter, and signal equalization. Focus on designing SerDes circuit blocks, using CAD tools for simulation, layout, and physical verification, and solving challenges in high-speed designs above 10Gbps and below 28nm technologies.
Location: San Jose, California, United States
Annual salary: $136,500–$253,500
Company
hirify.global develops technology for the design and development of electronic systems and integrated circuits.
What you will do
Design and develop analog and mixed-signal IC circuit blocks from concept and specification through final verification.
Design SerDes circuit blocks including drivers, receivers, serializers, deserializers, phase interpolators, low-jitter PLLs, and high-speed clock distribution.
Work on ADCs, DACs, bias and bandgap circuits, and voltage regulators.
Apply jitter and signal equalization techniques to high-speed SerDes designs.
Use CAD tools for circuit simulation, layout, and physical verification.
Collaborate with the team to solve complex analog design problems and communicate design decisions.
Requirements
At least 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
Thorough understanding of jitter and signal equalization techniques.
Proficient design experience in most of the listed SerDes and analog circuit blocks, including drivers, receivers, serializers, deserializers, phase interpolators, low-jitter PLLs, high-speed clock distribution, ADCs, DACs, bias and bandgap circuits, and voltage regulators.
Proficiency with CAD tools for circuit simulation, layout, and physical verification.
Excellent problem-solving skills, analog aptitude, good communication skills, and the ability to work cooperatively in a team environment.
MS or PhD in Electrical Engineering.
Nice to have
Working knowledge of common SerDes standards and their electrical requirements.
hirify.global tool experience, laboratory test experience, and design experience above 10Gbps and in technologies below 28nm.
Culture & Benefits
Paid vacation and paid holidays.
401(k) plan with employer match.
Employee stock purchase plan.
Medical, dental, and vision plan options.
Potential eligibility for bonus, equity, and other incentive compensation.
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