Principal Analog IC Design Engineer (SerDes)

TL;DR

Principal Analog IC Design Engineer (SerDes): Designing and developing analog/mixed-signal IC circuit blocks from concept to final verification with an accent on high-speed I/O and SerDes standards. Focus on solving complex challenges in jitter, signal equalization, and high-speed clock distribution for advanced process nodes.

Location: San Jose, CA (Onsite)

Salary: $136,500–$253,500

Company

A global leader in electronic design automation, software, and hardware intellectual property, helping engineers solve complex technological challenges.

What you will do

• Design and develop analog/mixed-signal IC circuit blocks from initial concept to final verification.
• Ensure conformance to customer specifications for high-speed I/O and SerDes designs.
• Work on critical circuit blocks including drivers, receivers, serializers, deserializers, and low-jitter PLLs.
• Collaborate within a team environment to solve complex analog design problems.
• Utilize CAD tools for circuit simulation, layout, and physical verification.

Requirements

• Minimum 7 years of experience in CMOS SerDes or high-speed I/O IC design.
• MS or PhD in Electrical Engineering.
• Thorough understanding of jitter and signal equalization techniques.
• Proficiency in designing SerDes circuit blocks such as ADC, DAC, bias, bandgap, and voltage regulators.
• Strong problem-solving skills and analog design aptitude.
• Proficiency in CAD tools for simulation and physical verification.

Nice to have

• Experience with common SerDes standards and electrical requirements.
• Design experience at speeds greater than 10Gbps.
• Experience with process technologies below 28nm.
• Hands-on lab test experience.
• Familiarity with hirify.global design tools.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance plans.
• 401(k) retirement plan with employer match.
• Employee stock purchase plan.
• Paid vacation and holidays.
• Opportunity to work on industry-leading technology and innovation.