Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
$178к-266к/год
$170к$180кмедиана$190к
По похожим ролям (50) ~ $180к/год
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Крутая вакансия
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Чётко очерченная роль технического лидера в крупной полупроводниковой компании: высокоскоростные сети и AI-инфраструктура, с ответственностью за весь путь от проектирования до запуска в производство.
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Очень высокий порогПередовые технологииВлияние на продуктКрупный производитель чипов
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Senior Principal Engineer, Hardware Application Engineering — Board & System Design (High-Speed Networking): Guiding customer hardware design-in for Marvell Ethernet Switch and UALink platforms, including board architecture, PCB stack-up, power, thermal, mechanical, and reliability design with an accent on high-speed SerDes systems and reference platforms. Focus on reviewing complex customer designs, developing reference hardware, solving SI/PI and bring-up challenges, and shaping 224G and 448G networking and AI fabric systems.
Location: Santa Clara, CA, United States; travel to customer sites, ODMs, and labs as needed.
Expected base pay: $177,820–$266,400 per annum. Bonus and equity plans are also available.
Company
hirify.global develops semiconductor solutions and silicon platforms for enterprise, cloud, AI, networking, connectivity, and carrier infrastructure.
What you will do
Serve as the senior technical advisor to customer engineering teams designing platforms around hirify.global Ethernet Switch and UALink silicon from architecture through production ramp.
Lead design-in reviews covering schematics, PCB stack-ups, system architecture, power delivery, thermal design, mechanical integration, signal integrity, and power integrity.
Define, develop, and support reference designs and evaluation platforms, including architecture, schematic, layout guidance, bring-up, and productization.
Guide high-speed PCB material selection, PDN design, multi-rail sequencing, decoupling, tolerance analysis, cooling, reliability, manufacturability, and testability.
Support customer lab bring-up, root-cause debugging, issue resolution, technical training, customer briefings, and executive or industry technical forums.
Partner with silicon, packaging, SI/PI, software, operations, and hardware engineering teams to influence product definition and roadmap planning through customer feedback.
Requirements
PhD, Master's, or Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
15+ years of experience in hardware design, development, and validation of high-speed networking or compute systems, including 7+ years dedicated to board and system design for platforms using 25G NRZ through 112G/224G PAM4 SerDes.
Full-lifecycle ownership of complex high-speed boards, including architecture, schematic, layout guidance, and bring-up.
Experience defining and delivering reference designs that enabled customer or internal platform adoption.
Strong expertise in high-speed, high-layer-count PCB stack-up design and material selection.
Deep experience with high-current ASIC power architecture, including PDN design, sequencing, decoupling, and tolerance analysis.
Experience with thermal design and mechanical integration for high-power network and AI systems.
Working knowledge of SI/PI principles, including reviewing customer simulations and independently running targeted simulations when needed.
Hands-on hardware bring-up, lab debugging, and root-cause analysis using industry-standard lab equipment; understanding of Ethernet, PCIe, DDR, advanced SerDes, and modern power delivery architectures.
Strong understanding of reliability, manufacturability, and testability across the product lifecycle, plus customer-facing experience resolving complex deployment issues.
Ability to develop and deliver technical training to engineering audiences, influence senior customer engineering teams, and collaborate across disciplines and geographies.
Nice to have
Direct experience with Ethernet switch platforms and/or emerging open AI fabric standards and architectures.
Experience designing or reviewing platforms for megascale data center deployments.
Background in reference platform design and customer enablement for silicon-based solutions.
Familiarity with ODM/CM manufacturing flows, including DFM, DFT, qualification, and reliability testing.
Experience with liquid or immersion cooling for high-power AI or networking platforms.
Fluency with Cadence Allegro/Sigrity or Mentor/Siemens Xpedition/HyperLynx; tool-agnostic candidates with deep expertise are welcome.
Experience influencing silicon and platform roadmaps through customer and field insights.
Culture & Benefits
Work in a customer-facing technical role within the U.S. Customer Solutions Group, collaborating closely with customer and internal engineering teams.
Employee stock purchase plan with a two-year lookback, bonus participation, and new-hire and annual equity grants.
Family support programs, mental and physical health resources, financial well-being programs, and recognition awards.
Travel is project-driven rather than continuous, with visits to customer sites, ODMs, and labs as needed.
Hiring process
Interviews evaluate individual experience, technical reasoning, and communication in real time.
AI tools, transcription applications, automated note-taking bots, and real-time answer generators are not permitted during interviews.
Access to export-controlled technology may require an export license review before employment.
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