Engineer, Digital Design Verification (SystemVerilog)

Location: Onsite in Ottawa, Canada

Salary: $72,000–$82,000 per year

Company

hirify.global's Signal Integrity Product Business Unit develops high-performance signal integrity ICs for data communications and video broadcast applications.

What you will do

• Perform functional verification of high-speed digital circuits using constrained-random verification methodologies.
• Develop behavioral models for analog circuits and run mixed-level analog/digital simulations.
• Work with analog, firmware, system, validation, test, product, and marketing engineers to meet customer and performance requirements.
• Provide technical guidance, leadership, and mentoring for verification tasks and other engineers.
• Create technical documentation, project plans, and schedules while supporting project milestones.
• Review and improve design verification methodologies and team productivity.

Requirements

• B.Sc. degree in Electrical or Computer Engineering and at least 2 years of relevant industry experience.
• Knowledge of constrained-random verification using UVM, OVM, AVM, or VMM.
• Knowledge of object-oriented programming; SystemVerilog is preferred.
• Experience with Python, TCL, Perl, or C scripting and programming languages.
• Working knowledge of PC and Unix/Linux operating systems and digital verification methods.
• Strong analytical, problem-solving, communication, organizational, and teamwork skills with the ability to manage multiple responsibilities.

Culture & Benefits

• Collaborative team environment involving digital, analog, and physical design specialists.
• Exposure to the full digital silicon development lifecycle, including definition, design, verification, and implementation.
• Opportunity to contribute to highly integrated mixed-signal IC development.
• Full-time employment with compensation based on qualifications, skills, education, experience, location, and total compensation.