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Senior Technical Staff Engineer – Analog Design

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Senior Technical Staff Engineer – Analog Design (Analog/Mixed-Signal IP): Defining architectures and designing advanced analog and mixed-signal IP for next-generation timing solutions, including PLLs, DLLs, ADCs, DACs, filters, and high-speed I/O, with an accent on transistor-level design, system-level integration, and silicon validation. Focus on guiding multi-site design teams, developing behavioral and Verilog-A models, solving process-corner and operating-condition challenges, and enabling first-pass silicon success.

Location: Canada - Montreal. Full-time position with 0%–25% travel.

Company

hirify.global develops semiconductor technology and products, including timing and communication solutions.

What you will do

  • Define architectures, specifications, and design methodologies for high-performance analog IP, including PLLs, DLLs, ADCs, DACs, filters, high-speed I/O interfaces, and related circuits.
  • Drive top-level mixed-signal system architecture and integrate analog IP into complex SoC environments.
  • Provide technical leadership through design reviews, modeling strategies, simulation methodologies, design trade-off decisions, and verification approaches.
  • Lead transistor-level design and advanced simulations across process corners and operating conditions.
  • Develop and review behavioral and Verilog-A models, and guide silicon validation, characterization, test planning, and laboratory evaluation.
  • Mentor junior and mid-level designers and collaborate with architects, digital and mixed-signal designers, layout teams, product engineers, and multi-site engineering groups to support first-pass silicon success.

Requirements

  • Master’s degree or Doctorate in Electrical Engineering or a closely related field.
  • 10+ years of industry experience in analog and mixed-signal IC design.
  • Proven experience designing analog and high-speed circuits such as PLLs/DLLs, ADCs/DACs, filters, and high-speed I/O.
  • Strong fundamentals in device physics, circuit theory, and layout-aware design.
  • Extensive experience with Cadence IC design tools and flows.
  • Hands-on experience with scripting and automation using tools or languages such as Skill, Python, Perl, or Tcl.
  • Strong communication skills and experience working effectively in multi-site engineering teams.

Nice to have

  • Advanced academic study or research in analog or mixed-signal design, particularly where it strengthens system-level insight or modeling approaches.
  • Experience applying research concepts to practical, production-ready silicon.
  • Expertise in mixed-signal system-level design and architecture.
  • Strong proficiency in Verilog-A for analog behavioral modeling.
  • Experience with silicon bring-up, debugging, and characterization in laboratory environments.
  • Exposure to MEMS analog interface circuits.

Culture & Benefits

  • Technically rigorous and stable engineering environment.
  • Opportunity to influence long-term product direction and mentor the next generation of designers.
  • Culture focused on trust, empowerment, respect, diversity, communication, disciplined engineering, and collaboration.
  • Microchip leadership development programs and employee development opportunities.
  • Focus on delivering reliable products for long-term customer use.

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