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обновлено 8 дней назад

Senior Technical Staff Engineer - Analog Design

153 000 - 203 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Technical Staff Engineer - Analog Design (Analog/Mixed-Signal ICs): Defining architectures and designing advanced analog and mixed-signal IP for next-generation timing solutions with an accent on PLLs, DLLs, data converters, filters, and high-speed I/O. Focus on transistor-level design, behavioral modeling, silicon validation, and guiding multi-site engineering teams through complex SoC integration challenges.

Location: Ottawa, Canada; travel expected 0%–25%

Annual base salary: 153,000–203,000

Company

hirify.global develops semiconductor technology and products used in timing, communication, and other applications, with a large global engineering organization.

What you will do

  • Define architectures, specifications, and design methodologies for analog IP including PLLs, DLLs, ADCs, DACs, filters, and high-speed I/O interfaces.
  • Drive top-level mixed-signal system architecture and integrate analog IP into complex SoC environments.
  • Provide technical guidance through design reviews, modeling, simulation methodology, silicon bring-up, and design trade-off decisions.
  • Lead transistor-level design and advanced simulations across process corners and operating conditions.
  • Develop and review behavioral and Verilog-A models for mixed-signal SoC simulation.
  • Guide silicon validation, characterization, test planning, laboratory evaluation, and coordination with architecture, digital, layout, product, and multi-site engineering teams.

Requirements

  • Master’s degree or Doctorate in Electrical Engineering or a closely related field.
  • 10+ years of industry experience in analog and mixed-signal IC design.
  • Experience designing high-speed and analog circuits including PLLs/DLLs, ADCs/DACs, filters, and high-speed I/O.
  • Strong fundamentals in device physics, circuit theory, and layout-aware design.
  • Extensive experience with Cadence IC design tools and flows.
  • Hands-on scripting and automation experience with tools such as Skill, Python, Perl, or Tcl.
  • Strong communication skills and experience working effectively in multi-site engineering teams.

Nice to have

  • Advanced academic study or research in analog or mixed-signal design.
  • Experience applying research concepts to production-ready silicon.
  • Expertise in mixed-signal system-level design and architecture.
  • Strong proficiency in Verilog-A for analog behavioral modeling.
  • Experience with silicon bring-up, debugging, and characterization in laboratory environments.
  • Exposure to MEMS analog interface circuits.

Culture & Benefits

  • Stable, technically rigorous environment focused on disciplined engineering, collaboration, and reliable products.
  • Opportunities to influence long-term product direction and mentor engineers.
  • Health benefits beginning on the first day.
  • Retirement savings plans, restricted stock units, quarterly bonus payments, and an employee stock purchase program with a six-month look-back feature.
  • Accessibility accommodations are available throughout the hiring process in accordance with Ontario requirements.

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