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3 часа назад

Senior Technical Staff Engineer - Analog Design

153 000 - 203 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Technical Staff Engineer - Analog Design (Analog and Mixed-Signal ICs): Defining architectures and developing advanced analog and mixed-signal IP, including PLLs, DLLs, ADCs, DACs, filters, and high-speed I/O interfaces, with an accent on transistor-level design, modeling, and SoC integration. Focus on guiding design teams through complex mixed-signal challenges, validating silicon, and shaping long-term analog IP direction.

Location: Ottawa, Ontario, Canada; onsite

Annual base salary: 153,000–203,000 USD, plus restricted stock units and quarterly bonuses.

Company

hirify.global Technology develops semiconductor products and solutions for timing, communication, and other technologies that power systems worldwide.

What you will do

  • Define architectures, specifications, and design methodologies for high-performance analog IP, including PLLs, DLLs, ADCs, DACs, filters, and high-speed I/O interfaces.
  • Drive mixed-signal system architecture and integrate analog IP into complex SoC environments.
  • Lead transistor-level design, advanced simulations, design reviews, and modeling strategy across process corners and operating conditions.
  • Develop and review behavioral and Verilog-A models for mixed-signal SoC simulation.
  • Guide silicon validation, characterization, test planning, and system-level laboratory evaluation.
  • Mentor analog designers and collaborate with architects, digital and mixed-signal designers, layout teams, product engineers, and multi-site engineering groups.

Requirements

  • Master’s degree or Doctorate in Electrical Engineering or a closely related field.
  • 10+ years of industry experience in analog and mixed-signal IC design.
  • Experience designing high-speed and analog circuits such as PLLs/DLLs, ADCs/DACs, filters, and high-speed I/O.
  • Strong knowledge of device physics, circuit theory, and layout-aware design.
  • Extensive experience with Cadence IC design tools and flows.
  • Hands-on scripting and automation experience with Skill, Python, Perl, or Tcl, plus strong communication skills.

Nice to have

  • Advanced academic research in analog or mixed-signal design.
  • Experience applying research concepts to production-ready silicon.
  • Expertise in mixed-signal system-level architecture and Verilog-A behavioral modeling.
  • Experience with silicon bring-up, debugging, characterization, or MEMS analog interface circuits.

Culture & Benefits

  • Technically rigorous and stable environment focused on disciplined engineering and reliable products.
  • Opportunities to influence long-term product direction and mentor engineers.
  • Health benefits begin on the first day.
  • Retirement savings plans and an employee stock purchase program with a six-month look-back feature.
  • Expected travel is 0%–25%.

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