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Photo Engineer – Lithography & Mask Layout (Semiconductor Manufacturing)

73 000 - 110 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Photo Engineer – Lithography & Mask Layout (Semiconductor Manufacturing): Owning photolithography processes and mask and reticle layout for InP wafer fabrication of DFB lasers, SOAs, and gain chips with an accent on process control, CD and overlay performance, and layout-for-manufacturability. Focus on qualifying stepper and coat/develop track processes, solving lithography excursions, improving yield, and coordinating mask data release with design teams and vendors.

Location: Onsite in Alhambra, California, USA

Salary: $73,000–$110,000 per year

Company

hirify.global operates an Indium Phosphide wafer fabrication facility producing DFB lasers, Semiconductor Optical Amplifiers, and gain chip products.

What you will do

  • Own end-to-end photolithography processes for InP wafer fabrication, including photoresist, exposure, development, and post-lithography steps.
  • Lead mask and reticle layout strategy, including layer definition, biasing, alignment marks, overlay schemes, and reticle floor planning.
  • Manage mask and reticle tape-out, review, release, revision control, and coordination with design teams and mask vendors.
  • Own stepper and coat/develop track tools, including qualification, recipe management, and performance monitoring.
  • Drive CD and overlay control, process-window characterization, SPC, root-cause analysis, yield improvement, and defect reduction.
  • Support new product introduction, process transfers, technology changes, manufacturing excursions, documentation, and cross-functional production activities.

Requirements

  • Bachelor’s degree or higher in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related field.
  • At least 5 years of semiconductor photolithography experience with direct involvement in mask or reticle layout design.
  • Hands-on experience with lithography steppers or aligners and coat/develop track systems in a wafer fab.
  • Experience preparing, reviewing, and releasing mask layout data, including GDS, layer definitions, and alignment strategies.
  • Strong knowledge of photoresist processes, CD control, overlay metrology, alignment schemes, SPC, and data-driven process control.
  • Experience working with mask vendors and managing mask lifecycle activities.

Nice to have

  • Experience with InP or III-V compound semiconductor wafer fabrication.
  • Familiarity with DFB lasers, photonic integrated circuits, or optical device manufacturing.
  • Experience in high-mix, low-volume manufacturing and knowledge of mask fabrication processes and mask-related yield risks.

Culture & Benefits

  • Hands-on work in a wafer fabrication manufacturing environment.
  • Cross-functional collaboration with design, process, equipment, metrology, yield, and manufacturing teams.
  • Work focused on production reliability, quality systems, process stability, and yield improvement.

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