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2 часа назад

Sr Mgr/Dep Director ASIC Digital Design IP Engineering (Processor Design)

167 000 - 275 000$
Тип работы
fulltime
Грейд
director
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Sr Mgr/Dep Director ASIC Digital Design IP Engineering (Processor Design) (ASIC/Processor Design): Leading the design and delivery of next-generation processor and SoC IP from architectural specification through tapeout with an accent on microarchitecture, RTL implementation, integration, and silicon execution. Focus on optimizing power, performance, and area, driving timing closure and signoff readiness, and building high-performing digital design teams.

Location: Santa Clara, United States

Expected salary range: $167,000–$275,000 per year

Company

hirify.global is a full-service semiconductor foundry providing design, development, and fabrication services with a global manufacturing footprint.

What you will do

  • Lead end-to-end development of processor cores and subsystems from architectural specification through tapeout.
  • Drive microarchitecture definition, RTL implementation, SoC integration, and design quality reviews.
  • Support synthesis, timing closure, verification closure, signoff readiness, and successful silicon delivery.
  • Develop project plans, allocate resources, track milestones, and mitigate execution risks.
  • Collaborate with architecture, verification, physical design, DFT, firmware, software, program management, and external partners.
  • Build, mentor, recruit, and retain a high-performing processor design team.

Requirements

  • Bachelor’s or master’s degree in Electronics, Computer, or Electrical Engineering, or a related field.
  • 12+ years of experience in digital IC, SoC, or processor design.
  • Strong expertise in microarchitecture, RTL design with Verilog/SystemVerilog, processor pipelines, memory subsystems, SoC integration, ASIC design flow, synthesis, and timing analysis.
  • Proven successful silicon delivery and experience leading medium to large engineering teams.
  • Strong understanding of PPA optimization, communication, leadership, and stakeholder management.

Nice to have

  • Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
  • Experience with RISC-V, MIPS, ARM, ARC, or custom processor architectures.
  • Experience with 7nm, 5nm, 3nm, or more advanced technology nodes.
  • Experience with multicore processors, AI accelerators, or high-performance computing architectures.
  • Experience leading geographically distributed teams.

Culture & Benefits

  • Focus on technical excellence, innovation, collaboration, and accountability.
  • Support for career development, coaching, and succession planning.
  • Environmental, health, safety, and security requirements are part of the role.
  • Employment is subject to applicable pre-employment conditions and laws.

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