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15 часов назад

Sr. Director of Silicon Hardware Engineering (Boards, Packages, and Reliability)

231 500 - 335 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
director
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Sr. Director of Silicon Hardware Engineering (Boards, Packages, and Reliability) (Semiconductor Hardware): Leading global engineering functions for chip packages, board hardware, and silicon power and reliability with an accent on advanced 2.5D/3D packaging, signal integrity, power integrity, and reliability qualification. Focus on executing multi-program hardware strategies, improving tapeout and first-pass silicon success, and managing vendors and distributed teams across US and Asia.

Location: San Jose, California, United States

Salary: $231,500–$335,000 USD annually for the Bay Area California market

Company

hirify.global is an independent FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.

What you will do

  • Lead chip package development, board development, and silicon power and reliability engineering functions.
  • Build and develop distributed engineering teams across US and Asia sites.
  • Define technical strategies for 2.5D/3D IC, flip-chip, high-density interconnect, and advanced packaging.
  • Oversee board hardware development from concept through bring-up, including design-for-manufacturability and design-for-test.
  • Drive signal integrity, power integrity, power budgeting, electromigration, ESD, and reliability qualification programs.
  • Own multi-program execution, cost reduction, supplier qualification, and vendor relationships with OSATs, PCB fabricators, substrate suppliers, and EDA vendors.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a closely related field; a master’s degree is preferred.
  • 15+ years of progressive semiconductor hardware engineering experience, including at least 5 years in senior leadership or director-level roles.
  • Experience managing global cross-functional engineering teams across US and Asian sites.
  • Deep expertise in chip package development, advanced packaging, substrate design, and OSAT management.
  • Experience with board schematics, layout, bring-up, signal integrity, and power integrity analysis tools such as Ansys SIwave, Cadence Sigrity, or HyperLynx.
  • Knowledge of silicon design methodologies including synthesis, place and route, timing closure, and design-for-test, plus strong executive communication skills.

Culture & Benefits

  • Work within a global, distributed engineering organization.
  • Collaborate with silicon architecture, SoC design, system integration, product management, customers, and technology partners.
  • Receive incentive opportunities based on individual and company performance.
  • Participate in a results-driven culture focused on technical excellence, operational improvement, and supply chain resilience.
  • Applicants must be eligible for any required U.S. export authorizations.

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