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2 часа назад

IC Design Engineer (ASIC)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
c1
Страна
UK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
IC Design Engineer (ASIC) (SoC/MCU architecture): Designing and delivering next-generation Raspberry Pi silicon from specification through RTL design, verification, and implementation with an accent on microcontroller architecture, SoC integration, and software-aware hardware decisions. Focus on owning front-end design, planning verification, supporting FPGA platforms, and resolving power, timing, and PPA challenges through tape-out.

Location: Cambridge, England, United Kingdom. On-site with full-time office attendance required.

Company

hirify.global develops its own silicon for next-generation computing products, including microcontrollers and platform chips.

What you will do

  • Own front-end ASIC tasks from specification and IP integration through design, verification, and implementation.
  • Create verification plans and execute verification using simulation, formal methods, emulation, and FPGA platforms.
  • Specify and configure IP and SoC systems in collaboration with ASIC specialists.
  • Work closely with the software team on embedded development, toolchain, SDK, and developer experience implications.
  • Support FPGA platforms for rapid software development and verification.
  • Assist implementation teams with power analysis, timing closure, DFT, and physical design constraints.

Requirements

  • Typically 10+ years of experience in SoC or MCU architecture, including at least one tape-out with architectural ownership of a chip or substantial subsystem.
  • Deep knowledge of microcontroller and processor design, real-time behavior, interrupt handling, low-power modes, memory hierarchies, and common peripherals.
  • Strong understanding of SoC interconnects, AXI/AHB/APB, caches, DMA, memory controllers, security architecture, and mixed real-time and OS-class systems.
  • Credible experience across SystemVerilog RTL, UVM, formal verification, emulation/FPGA, DFT, timing closure, power analysis, and physical design constraints.
  • Experience writing non-trivial embedded C and understanding the impact of architecture on software toolchains and SDKs.
  • Ability to communicate complex technical decisions clearly, work autonomously and collaboratively, and deliver to schedule; familiarity with Bash, Python, Tcl, or similar scripting languages.

Nice to have

  • Experience with the Cadence simulation tool flow.
  • Experience with ASIC/FPGA synthesis and implementation, DFT architecture and insertion, software development, and scripting.

Culture & Benefits

  • Work across the full silicon flow in a small ASIC team, from specification through production qualification.
  • Employer pension contribution of 8% when contributing 4% of gross salary through the salary sacrifice scheme.
  • Life assurance of four times base salary.
  • Income protection covering 75% of base salary after 13 weeks of long-term illness or absence.
  • Private medical insurance and access to an electric vehicle salary sacrifice scheme, subject to eligibility.

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