Senior Silicon Validation Engineer (Cryo-CMOS)

Location: Oxford, England, United Kingdom. Hybrid working pattern. The role involves room-temperature validation and cryogenic testing at approximately 4 kelvin.

Company

hirify.global develops integrated quantum computing, networking, sensing, and security platforms, including trapped-ion quantum processors and Cryo-CMOS technology.

What you will do

• Own silicon validation strategy, plans, acceptance criteria, readiness reviews, traceability, and acceptance reporting for ASICs.
• Lead first-silicon bring-up and characterisation of analogue and mixed-signal circuits across supply, temperature, operating modes, and device variation.
• Develop validation boards, fixtures, Python automation, instrument drivers, regression suites, and reproducible data-analysis workflows.
• Plan and lead cryogenic measurements, including bare-die probing and cold signal-chain testing, and drive failures to root cause.
• Correlate measurements with simulations, device models, foundry data, and partner data while separating silicon defects from board, firmware, and test artefacts.
• Influence testability before tape-out, coordinate external design partners and foundry work, lead technical reviews, mentor engineers, and improve test reuse and throughput.

Requirements

• Substantial experience in analogue or mixed-signal silicon validation and characterisation, including ownership of multiple silicon bring-up programmes.
• A degree in electrical or electronic engineering, or equivalent practical experience.
• Strong electronics fundamentals and experience validating precision signal chains, data converters, or power-management circuits with digital control interfaces.
• Hands-on experience with oscilloscopes, precision sources and meters, signal generators, spectrum analysers, and logic analysers, including reliable low-noise and low-leakage measurements.
• Strong Python programming for instrument control, automated testing, and statistical analysis, plus disciplined Git or equivalent version-control practices and maintainable test software.
• Experience designing and debugging test PCBs, reviewing layouts, and working with SPI, I2C, JTAG, and custom shift-register chains alongside embedded firmware or FPGA-based platforms.
• Experience resolving complex chip, board, and software interactions through structured experiments and collaboration.
• Experience leading technical projects, mentoring engineers, and communicating evidence, uncertainty, and decisions in clear written reports.

Nice to have

• Cryogenic or other extreme-temperature testing; wafer or bare-die probing; early-stage IP or test-chip evaluation.
• FPGA development, C/C++, circuit simulation, and production-test correlation.
• Prior quantum-computing experience.

Culture & Benefits

• Flexible hybrid working in a community of scientists, engineers, and innovators.
• Career-development opportunities alongside industry leaders.
• Competitive salary, hirify.global stock options, and an annual performance bonus.
• Generous annual leave, private medical and dental insurance, and comprehensive medical, dental, and vision plans.
• Matching 401(k), unlimited PTO, paid holidays, parental and adoption leave, legal insurance, and a home technology stipend.
• Culture focused on autonomy, productivity, respect, equal opportunity, and inclusion.

Hiring process

• Applicants may be asked additional immigration-status questions for export-control and government-contract compliance.
• Employment is contingent on confirming U.S. Person status, obtaining a necessary export-control licence, or confirming an applicable licence exception for restricted technology access.