Senior Design Automation Engineer - Frontend Design Verification (FPGA)

Location: San Jose, California, United States

Salary: $178,900–$259,000 USD for the Bay Area, California

Company

hirify.global develops programmable logic devices, embedded systems, and high-performance accelerators for telecommunications, data centers, aerospace, and AI workloads.

What you will do

• Develop, deploy, and support design automation flows and methodologies for digital semiconductor design.
• Build scripts, tooling customizations, and automation frameworks using AI-driven tools and systems.
• Evaluate, integrate, and enhance EDA tools across FPGA design workflows.
• Automate repetitive design tasks with robust, scalable, and maintainable solutions.
• Collaborate with design and verification teams to identify bottlenecks and improve workflows.
• Work with internal teams and external EDA vendors to resolve tool issues and adopt new capabilities.

Requirements

• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related field.
• 8+ years of relevant industry experience; 10+ years with design automation tools is preferred.
• Hands-on experience with front-end RTL, design verification EDA tools, and FPGA or ASIC design flows, including VCS, Xcelium, or SpyGlass.
• Experience with AI/ML-driven EDA features or with data pipelines and training systems for learning-based design automation.
• Proficiency in Unix/Linux and Python, Tcl, and Shell scripting or programming.
• Applicants must be eligible for required U.S. export authorizations.

Nice to have

• Experience with front-end pre-silicon design verification flows.
• Familiarity with lint, CDC, and RDC features of EDA tools.
• Experience in large-scale SoC or IP development environments.
• Strong communication and collaboration skills across design and CAD/EDA teams.

Culture & Benefits

• Regular full-time employment.
• Incentive opportunities based on individual and company performance.
• Collaborative environment focused on innovation, automation, and engineering excellence.