ASIC Validation Engineer (AI Infrastructure)

Location: Saratoga, CA, United States

Company

hirify.global is a Silicon Valley hardware startup developing silicon, packaging, software, and systems infrastructure to improve AI data-center performance, GPU utilization, power efficiency, and reliability.

What you will do

• Drive post-silicon validation and bring-up of networking ASICs and chiplet-based SoCs.
• Own validation planning, coverage definition, and test execution across UCIe, SerDes, and networking subsystems.
• Develop Python automation and test infrastructure for high-speed link and protocol validation.
• Perform silicon bring-up, including power sequencing, link training, and PHY initialization.
• Validate UCIe interfaces, die-to-die interconnects, and high-bandwidth chiplet fabrics at link and system level.
• Debug cross-domain issues across RTL, firmware, analog PHY, packaging, boards, and systems while characterizing signal integrity, latency, throughput, and thermal/power behavior across PVT corners.

Requirements

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• Experience validating and bringing up complex ASICs or SoCs after silicon.
• Hands-on experience with UCIe, PCIe, and high-speed interconnect standards.
• Proficiency in Python for scripting, automation, and data analysis.
• Strong laboratory experience with oscilloscopes, BERTs, logic analyzers, and JTAG-based debuggers.
• Excellent communication skills and experience working in cross-functional silicon development teams.

Nice to have

• Experience with chiplet-based systems, UCIe protocol-stack validation, and multi-die integration challenges involving power delivery, timing, and thermal behavior.
• Familiarity with emulation or FPGA prototyping for pre-silicon validation.
• Experience with hardware/software co-validation for networking protocols or control-plane software.
• Knowledge of package-level interactions and signal-integrity analysis for high-speed interfaces.

Culture & Benefits

• Work on next-generation AI infrastructure and networking silicon.
• Collaborate with experienced architecture, design, firmware, board, test, and system engineering teams.
• Contribute to products targeting improved AI performance, GPU utilization, capital costs, power consumption, and reliability.
• Base salary is determined according to skills, experience, qualifications, work location, market trends, and comparable employee compensation.