6 часов назад
Principal Silicon Validation Engineer (AI Infrastructure)
205 000 - 260 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Principal Silicon Validation Engineer (AI Infrastructure): Developing and executing electrical validation tests for semiconductor connectivity products used in AI and machine learning infrastructure with an accent on post-silicon validation, high-speed interfaces, and parametric performance analysis. Focus on automating IC- and board-level testing, debugging complex SoCs, quantifying operating margins, and root-causing unexpected behavior with high-speed laboratory equipment.
Location: San Jose, California, United States
Salary: USD $205,000–$260,000 base salary per year
Company
develops rack-scale AI infrastructure and semiconductor connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, UALink, and software-based connectivity technologies.
What you will do
- Define comprehensive post-silicon validation plans for complex connectivity products.
- Develop and execute electrical validation tests to quantify parametric performance and operating margins.
- Automate IC- and board-level testing using Python and related software tools.
- Debug and bring up complex SoCs with high-speed PCIe and Ethernet interfaces.
- Design experiments to identify and root-cause unexpected behavior.
- Analyze and report validation results, collaborate with internal stakeholders, and certify production-ready designs.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field; a Master’s degree is preferred.
- At least 10 years of experience supporting or developing complex SoC or silicon products for server, storage, or networking applications.
- Experience debugging and bringing up SoCs with high-speed PCIe or 802.3 Ethernet interfaces.
- Strong Python scripting and object-oriented programming skills, with basic Git-based DevOps knowledge.
- Proficiency with high-speed laboratory equipment, including BERTs, oscilloscopes, and VNAs.
- Knowledge of high-speed design blocks and signaling, including PLLs, CTLE, DFE, Tx EQ, and PAM4.
Nice to have
- Experience with system testing, characterization, margin analysis, and optimization of multi-gigabit data links.
- Experience with PCIe or Ethernet electrical compliance testing and signal integrity for PCIe, Ethernet, CEM, or NVMe interfaces.
- Working knowledge of C or C++ for embedded firmware and serial specifications such as I2C and SPI.
- Knowledge of schematic capture, PCB layout, MATLAB, Keysight ADS, or PLTS.
- Familiarity with IEEE 802.3x standards and NRZ and PAM4 signaling.
Culture & Benefits
- Work on connectivity products supporting artificial intelligence and machine learning infrastructure.
- Collaborate with hyperscalers, ecosystem partners, and internal engineering stakeholders.
- Operate in an environment encouraging creativity, innovation, and diverse perspectives.
- Role requires independent problem-solving, prioritization, and minimal supervision.
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