DDR Memory Interface System Validation Lead Engineer (DDR5/LPDDR5)

Location: San Jose, California, United States

Salary: $149,100–$215,000 USD per year; additional incentive opportunities may apply.

Company

hirify.global is an independent pure-play FPGA solutions provider developing programmable technologies for AI, cloud, networking, and edge markets.

What you will do

• Own DDR5 and LPDDR5 memory subsystem validation across multiple FPGA programs.
• Define and execute system-level validation strategies, plans, environments, test suites, and measurement flows.
• Perform pre-silicon and post-silicon functional, electrical, timing, compliance, interoperability, and performance validation.
• Validate memory initialization and training, read/write functionality, margining, stress behavior, frequency scaling, error recovery, stability, and reliability.
• Analyze signal integrity and timing behavior, including eye diagrams, jitter, and timing margins, using protocol analyzers, oscilloscopes, logic analyzers, and traffic generators.
• Drive root-cause analysis and resolution of silicon, firmware, board-level, and system-level issues with cross-functional engineering teams.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field.
• At least 8 years of industry experience in memory subsystem validation, silicon validation, or high-speed interface validation.
• Experience validating DDR5 and LPDDR5 controllers, PHYs, and associated high-speed interfaces.
• Knowledge of JEDEC specifications, timing characterization, signal integrity, board layouts, routing, SI/PI, memory topologies, termination, and power delivery.
• Applicants must be eligible for any required U.S. export authorizations.

Culture & Benefits

• Hands-on work with advanced memory technologies, PHY architectures, and high-speed validation infrastructure.
• Opportunity to influence FPGA platform capabilities and validation methodologies.
• Collaboration with architecture, silicon design, package, board design, firmware, and software teams.
• Regular full-time employment with incentive opportunities based on individual and company performance.
• Artificial intelligence is used to screen, assess, or select applicants.