Lead Design Engineer (DDR)

Location: San Jose, California

Salary: $114,800–$213,200

Company

A global leader in electronic design and computational software, helping innovators solve complex technological challenges.

What you will do

• Lead electrical and functional validation for DDR5, LPDDR5, LPDDR6, HBM4, and GDDR7 interfaces.
• Develop and execute innovative testing strategies to accelerate post-silicon bring-up.
• Analyze raw data to generate actionable insights and high-impact characterization reports.
• Drive complex debug workflows using JIRA and collaborate across cross-functional teams.
• Automate validation, data processing, and reporting tasks using Python.
• Serve as the technical expert for customer DDR IP challenges to ensure rapid resolution.

Requirements

• M.Tech with 4+ years of experience or B.Tech with 6+ years of experience.
• Strong expertise in electrical and functional validation of high-speed interfaces.
• Proficiency in Python for automation and data processing.
• Proven ability to manage complex debug workflows and technical problem-solving.
• Excellent communication skills for customer-facing technical support.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance plans.
• 401(k) retirement plan with employer matching.
• Employee stock purchase plan.
• Paid vacation and company holidays.
• Opportunity to work on cutting-edge semiconductor technology.