Memory Circuit Design Engineer (CMOS)

TL;DR

Memory Circuit Design Engineer (CMOS): Developing and optimizing advanced memory technology for next-generation silicon products with an accent on PPA (power, performance, and area) optimization and DTCO. Focus on designing memory bit-cells, complex periphery IC layouts, and executing pre-Si/post-Si verification for high-performance embedded memory.

Location: Hybrid; must be based in the US (Hillsboro, OR; Phoenix, AZ; Santa Clara, CA; or Austin, TX)

Salary: $122,440 – $232,190 USD

Company

A global leader in semiconductor manufacturing and silicon product design, focusing on enabling the AI era through cutting-edge process and packaging technology.

What you will do

• Perform memory pathfinding and PPA optimization through design technology co-optimization (DTCO).
• Develop memory bit-cell and complex periphery IC layouts and automation.
• Design memory arrays, IP, and innovative circuits for test-chips.
• Execute pre-Si verification and post-Si validation/debugging to enable yield and parametric tracking.
• Collaborate with EDA vendors and product design teams to deliver industry-leading memory technology collaterals.

Requirements

• Master's degree in Electrical or Computer Engineering with 4+ years of professional experience, or a PhD in a related discipline.
• Experience in design, characterization, and verification of custom memory circuits such as SRAM, Register Files, or ROM.
• Proficiency in managing trade-offs between power, performance, and area (PPA).
• Expertise in custom digital circuit design, simulation, and layout verification.
• Knowledge of EDA tools used for custom digital and memory circuit design.
• Must be based in or have authorization to work in the United States.

Nice to have

• PhD with 1-2 years of professional experience.
• Experience with Design Technology Co-Optimization (DTCO).
• Post-Si validation experience.
• Knowledge of the CMOS ASIC design flow.

Culture & Benefits

• Competitive total compensation package including base pay and stock bonuses.
• Comprehensive benefits programs including health insurance, retirement, and vacation.
• Hybrid work model allowing split time between on-site and off-site work.
• Opportunity to work on state-of-the-art semiconductor manufacturing for the AI era.