AI Silicon, Junior Digital Design Engineer (AI)

Location: Mountain View, California, United States; work is connected to the Palo Alto office.

Company

hirify.global develops semiconductor-based computing platforms designed to improve the energy efficiency of AI computation.

What you will do

• Contribute to SoC micro-architecture definition and integrate CPU, interface, memory, and third-party IP blocks.
• Write synthesizable Verilog/SystemVerilog RTL for SoC blocks and digital interfaces.
• Implement low-power design techniques, including clock gating and power domains, while meeting power, performance, and area targets.
• Perform synthesis, formal verification, timing constraint development, linting, CDC, and RDC analysis.
• Support block-level verification, investigate simulation failures, and debug functional issues.
• Coordinate technical interfaces and handoffs between digital design and physical implementation teams.

Requirements

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• 4+ years of industry experience in digital ASIC/SoC design.
• Expertise in Verilog RTL coding and digital design fundamentals.
• Familiarity with EDA tools for simulation, assertions, synthesis, linting, and CDC analysis.
• Understanding of the complete ASIC design flow from specification through tape-out.
• Excellent written and verbal communication skills.

Nice to have

• Experience with machine learning or neural network accelerator architectures.
• Experience debugging UVM environments and knowledge of formal verification techniques.
• Exposure to post-silicon bring-up and lab debugging with logic analyzers or oscilloscopes.
• Experience with generative AI code development platforms or analog mixed-signal block integration.

Culture & Benefits

• Work in a small, multidisciplinary R&D team on challenging problems spanning AI, physics, and computer architecture.
• Opportunity for ownership and impact in developing a new computing platform.
• Comprehensive health benefits and 401(k) matching.
• Unlimited paid time off and complimentary meals at the Palo Alto office.