Назад
Company hidden
7 часов назад

IC - Frontend - Senior Staff Engineer (AI)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
IC - Frontend - Senior Staff Engineer (AI/ASIC): Defining microarchitecture and implementing RTL logic for next-generation ASIC designs with an accent on power, performance, area, verification, and timing closure. Focus on debugging complex test scenarios, integrating DFT logic, optimizing physical design, and closing coverage across cross-functional hardware teams.

Location: US — on-site

Company

hirify.global builds high-performance infrastructure for demanding artificial intelligence workloads across silicon, systems, and networking.

What you will do

  • Define and document microarchitecture for next-generation ASIC designs in collaboration with the architecture team.
  • Implement RTL and logic designs that meet power, performance, and area targets.
  • Collaborate with design verification and emulation teams on test plans, complex scenario debugging, and coverage closure.
  • Work with physical design teams on timing closure and area optimization.
  • Integrate design-for-test logic and collaborate across architecture, verification, emulation, and physical design functions.

Requirements

  • Bachelor’s or master’s degree in electrical engineering, computer engineering, or computer science.
  • 3+ years of related technical engineering experience, including 3+ years of industry experience in logic design for complex ASICs.
  • Professional experience with SystemVerilog for logic design.
  • Understanding of logic design, clock-domain crossing, synthesis, and timing closure.
  • Strong communication and collaboration skills with the ability to work independently and contribute to diverse teams.
  • Ability to thrive or lead in a fast-paced startup environment.

Nice to have

  • 10+ years of relevant industry experience and a record of successful tapeouts.
  • Python or Perl scripting proficiency and experience with LINT, CDC, or RDC tools.
  • Silicon bring-up experience and the ability to analyze timing, area, and power reports and drive design fixes.
  • Knowledge of verification, coverage analysis, complex test-case debugging, and formal verification.
  • Experience with high-performance, low-latency networking ASICs.

Culture & Benefits

  • Work on foundational infrastructure for high-performance AI workloads.
  • Talent-dense environment focused on ownership, technical rigor, speed, and first-principles engineering.
  • Opportunity to contribute to high-impact silicon, systems, and networking projects.
  • Equal opportunity employer with accessibility accommodations available throughout the hiring process.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →