3 часа назад
AI Silicon, Design Verification
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
AI Silicon, Design Verification (UVM/SystemVerilog): Building comprehensive verification architectures, testbenches, and infrastructure for AI silicon IP blocks and full-chip designs with an accent on constrained-random stimulus, coverage-driven verification, and assertions. Focus on debugging RTL and gate-level failures, analyzing functional and code coverage, and driving verification closure across digital, analog, software, and systems interfaces.
Location: Mountain View, CA, United States
Company
is developing energy-efficient computing architectures for AI by leveraging semiconductor device physics.
What you will do
- Define, architect, and implement verification plans and environments for IP blocks and full-chip designs from specification through tape-out.
- Build scalable verification infrastructure, testbenches, test cases, and automated environments.
- Apply UVM and SystemVerilog for constrained-random stimulus, coverage-driven verification, and assertions.
- Collaborate with digital and analog design, software, and systems teams to define requirements and debug hardware/software interactions.
- Analyze functional and code coverage and debug RTL- and gate-level failures to achieve verification closure.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- At least 8 years of hands-on experience with advanced verification methodologies and languages.
- Strong experience with UVM and SystemVerilog is required.
- Experience developing and maintaining complex verification testbenches and automated test environments.
- Proficiency in Python, Shell, or Bash for verification-flow automation and result analysis.
- Familiarity with Linux and industry-standard Cadence and Synopsys tools.
Nice to have
- Master’s degree or Ph.D. in Electrical Engineering or Computer Science, with an emphasis on computer architecture.
- Expert-level knowledge of UVM architecture and high-level behavioral modeling.
- Experience with AI-driven code generation tools.
Culture & Benefits
- Opportunity to contribute as a foundational team member with significant ownership.
- Work on complex, unsolved problems across AI, semiconductors, and computing.
- Comprehensive health benefits and 401(k) matching.
- Unlimited paid time off.
- Complimentary meals at the Palo Alto office.
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