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10 часов назад

Senior Design Verification Engineer (AI)

120 000 - 225 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Design Verification Engineer (AI): Developing and verifying digital dataflow architectures for next-generation AI processors with an accent on system-level verification, UVM testbenches, interconnects, DMA engines, and memory controllers. Focus on modeling and emulating large AI networks, creating coverage-driven verification infrastructure, and solving complex correctness challenges across hardware subsystems.

Location: Hybrid in Austin, Texas or Palo Alto, California

Salary: $120,000–$225,000+ annually

Company

hirify.global develops analog AI computing technology and next-generation AI processors for edge devices, cloud, data center, industrial, automotive, aerospace, and defense applications.

What you will do

  • Perform system-level and block-level verification of digital dataflow architectures.
  • Develop test plans, coverage plans, testbenches, and verification infrastructure using UVM or comparable methodologies.
  • Use architecture models and emulation environments to verify large AI network functionality.
  • Verify scheduling subsystems, high-performance interconnects, DMA engines, memory controllers, and related hardware blocks.
  • Collaborate with RTL design, architecture, analog IP, compiler, emulation, and post-silicon teams.

Requirements

  • Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of industry experience developing verification testbenches.
  • Knowledge of UVM or similar verification methodologies and understanding of Verilog, SystemVerilog, and UVM.
  • Strong understanding of computer architecture, including datapaths, memory hierarchies, and interconnects.
  • Experience verifying scheduling subsystems, high-performance interconnects, DMA engines, or memory subsystems.
  • Proven track record of first-pass silicon success and strong written and spoken communication skills.

Nice to have

  • Experience with emulation or FPGA prototyping for large-scale designs.
  • Knowledge of coverage-driven verification, advanced stimulus generation, or formal verification.
  • Experience with power-aware and performance-driven verification flows.
  • Prior experience verifying AI, DSP, or highly parallel architectures.
  • Strong scripting skills in Python or a similar language.

Culture & Benefits

  • Collaborative and respectful work environment.
  • Tools, support, and autonomy to deliver results.
  • Professionalism, creativity, integrity, and inclusion are valued.
  • Full-time employment with work based in Austin or Palo Alto under a hybrid arrangement.

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