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3 часа назад

AI Silicon, Digital Design Engineer (AI)

Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
AI Silicon, Digital Design Engineer (AI/ASIC): Designing and integrating CPU, memory, interface, and other timing-critical digital SoC blocks for a highly energy-efficient AI computing platform with an accent on RTL implementation, PPA optimization, and complete ASIC design flows. Focus on defining micro-architecture, integrating third-party IP, resolving CDC/RDC and timing challenges, supporting verification, and enabling rapid tapeout.

Location: Mountain View, California, United States

Company

hirify.global develops semiconductor-based computing technology designed to improve the energy efficiency of AI systems.

What you will do

  • Define micro-architecture and integrate CPU, memory subsystem, interface, and other digital blocks into the main SoC fabric.
  • Design and debug complex, timing-critical RTL blocks and digital interfaces while meeting power, performance, and area targets.
  • Integrate third-party IP and coordinate hand-offs with physical implementation teams.
  • Perform synthesis, formal verification, linting, CDC, and RDC analysis; create block-level timing constraints.
  • Support verification planning, investigate simulation failures, and validate functional correctness.
  • Mentor junior digital design engineers and help establish design methodologies, code review practices, and infrastructure for rapid tapeout.

Requirements

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
  • 8+ years of industry experience in digital ASIC or SoC design.
  • Expertise in Verilog RTL coding and digital design fundamentals.
  • Experience with EDA tools for simulation, synthesis, linting, and CDC analysis.
  • Understanding of the complete ASIC design flow from specification through tapeout.
  • Ability to lead and mentor junior engineers, with strong written and verbal communication skills.

Nice to have

  • Experience with synchronous and asynchronous logic, state machines, and bus protocols.
  • Experience developing scripts or tooling for design automation.
  • Experience optimizing designs for performance, power, or area.
  • Experience with generative AI code development platforms or analog mixed-signal interfaces.

Culture & Benefits

  • Work on complex, unsolved problems spanning AI, semiconductor physics, and computer architecture.
  • Broad ownership and the opportunity to shape the company's computing platform as a foundational R&D team member.
  • Health benefits and 401(k) matching.
  • Unlimited paid time off and complimentary meals at the Palo Alto office.

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