Senior Verification Engineer (AI)

Location: Palo Alto Office, United States

Company

hirify.global develops world models and agents for interacting with the physical world, with a focus on AI-designed electronics systems and semiconductors.

What you will do

• Own verification strategy across multiple IP blocks and subsystems, from testbench architecture through signoff.
• Design AI-assisted workflows to accelerate verification, coverage closure, and debugging.
• Build reusable verification frameworks with SystemVerilog, UVM, Python, and custom automation tooling.
• Integrate AI models into existing design-verification environments in collaboration with ML and software teams.
• Drive tapeout readiness, regression health, quality metrics, and coverage targets.
• Work with customers when needed, contribute to product direction, and mentor junior engineers.

Requirements

• 4–6 years of hands-on verification experience.
• Strong SystemVerilog and UVM skills with proven debugging depth.
• Familiarity with Python or similar scripting languages.
• Interest in applying AI or automation to verification.
• Ability to collaborate across software and ML domains and communicate with clients, architects, and leadership.
• Ability to work from the Palo Alto office.

Nice to have

• Experience with formal verification, co-simulation, or stimulus-generation frameworks.
• Background in ML, LLMs, data pipelines, or tool development.
• Customer-facing or forward-deployed engineering experience.
• Experience building tools adopted by other engineers.

Culture & Benefits

• High ownership over technical decisions, roadmap input, and customer interactions.
• Opportunity to shape AI-guided verification tooling and methodologies.
• Fast-moving environment focused on initiative and building new solutions.
• Exposure to both engineering and product development.