Назад
2 дня назад

ASIC Design Engineer (Machine Learning Acceleration)

136 000 - 184 000$
Тип работы
fulltime
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
ASIC Design Engineer (Machine Learning Acceleration): Designing and optimizing custom SoC hardware and high-performance RTL for AWS machine learning inference servers with an accent on SystemVerilog, microarchitecture, power efficiency, and timing-clean implementation. Focus on analyzing architecture trade-offs, building synthesis-ready designs, running lint and clock-domain-crossing checks, and collaborating across verification, validation, and backend engineering.

Location: Cupertino, CA, USA or Austin, TX, USA

Salary: $136,000–$184,000 annually in Austin; $157,300–$212,800 annually in Cupertino. Compensation may also include sign-on payments and RSUs.

Company

Amazon Web Services provides scalable cloud infrastructure and develops custom machine learning hardware, including AWS Inferentia.

What you will do

  • Develop high-performance, area-efficient, and power-efficient RTL designs for custom SoCs and machine learning acceleration hardware.
  • Create microarchitectures and implement SystemVerilog RTL with synthesis- and timing-clean results.
  • Analyze architectures and designs to optimize feature, power, performance, and area trade-offs.
  • Run lint and clock-domain-crossing quality checks to ensure design integrity.
  • Collaborate with architects, designers, verification engineers, validation teams, synthesis specialists, timing engineers, and backend experts.

Requirements

  • Bachelor’s degree in Electrical Engineering or a related field.
  • Experience identifying bugs in architectures, algorithms, functionality, and performance, with strong debugging skills.
  • Experience verifying logic at multiple levels, from IP blocks and SoCs to full-system testing.
  • Strong ASIC design background and proficiency in SystemVerilog.
  • Familiarity with interconnects, DMAs, memory subsystems, accelerator engines, debug, and system-level architectures.

Nice to have

  • Master’s degree in Electrical or Communications Engineering or a related field.
  • Experience with formal verification, including abstraction and end-to-end checking.
  • Experience with ARM and DSP instruction set architectures.
  • Experience with RF and broadband wireless standards, including 4G/5G NR, WiMAX, 802.11ad, or microwave backhaul.
  • Experience with Python or Perl and industry-standard automation tools.

Culture & Benefits

  • Inclusive environment supported by employee-led affinity groups and global learning initiatives.
  • Flexible working hours with an emphasis on work-life balance.
  • Mentorship, knowledge sharing, and career development through progressively complex projects.
  • Benefits include health insurance, 401(k) matching, paid time off, parental leave, flexible spending accounts, and mental health support.

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