FPGA Development Tools Engineer – Synthesis (FPGA)

Location: San Jose, California, United States

Salary: $149.1K–$215.9K USD annually for the Bay Area, California. Incentive opportunities may also be available.

Company

Develops programmable FPGA solutions and compiler tools for AI, cloud computing, networking, and edge applications.

What you will do

• Design, implement, and optimize synthesis algorithms that convert Verilog, SystemVerilog, and VHDL RTL into efficient gate-level representations.
• Contribute to FPGA compiler flows integrating synthesis with placement, routing, and static timing analysis.
• Improve performance, power, and area through synthesis-driven quality-of-results optimizations.
• Develop tools and methodologies for analyzing and transforming complex RTL designs.
• Collaborate with architecture, STA, placement, routing, and validation teams across the toolchain.
• Debug synthesis results and build scripting, automation, and productivity tools.

Requirements

• 6+ years of experience in FPGA or ASIC design, EDA tools, or related fields.
• Hands-on experience with Verilog, SystemVerilog, or VHDL and RTL design and synthesis flows.
• Proficiency in C/C++, algorithms, data structures, debugging, and performance analysis.
• Understanding of logic synthesis, optimization, FPGA or ASIC flows from synthesis through placement, routing, and STA, and timing-driven design.
• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field; relevant doctoral-study experience may count toward the experience requirement.
• Applicants must be eligible for any required U.S. export authorizations.

Nice to have

• Experience with Quartus, Vivado, or other synthesis and FPGA toolchains.
• Knowledge of FPGA architectures, including LUTs, DSPs, BRAM, and interconnect.
• Experience with retiming, logic restructuring, resource sharing, Python, Tcl, compiler development, or EDA algorithms.
• Experience working in large, distributed engineering teams.

Culture & Benefits

• Build core synthesis technology for next-generation FPGA platforms.
• Influence compiler architecture and performance at scale.
• Collaborate with engineers across silicon, architecture, and software.
• Regular full-time employment with performance-based incentive opportunities.